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LTC2321-16

232116fc

For more information www.linear.com/2321-16

applicaTions inForMaTion

Single-Ended-to-Differential Conversion

While single-ended signals can be directly digitized as

previously discussed, single-ended to differential conver-

sion circuits may also be used when higher dynamic range

is desired. By producing a differential signal at the inputs

of the LTC2321-16, the signal swing presented to the ADC

is maximized, thus increasing the achievable SNR.

The LT®1819 high speed dual operational amplifier is

recommended for performing single-ended-to-differen-

tial conversions, as shown in Figure 8. In this case, the

first amplifier is configured as a unity-gain buffer and the

single-ended input signal directly drives the high imped-

ance input of this amplifier.

Fully-Differential Inputs

ToachievethefulldistortionperformanceoftheLTC2321-16,

a low distortion fully-differential signal source driven

through the LT1819 configured as two unity-gain buf-

fers, as shown in Figure 9, can be used. This circuit

achieves the full data sheet THD specification of –85dB

at input frequencies of 500kHz and less. Data sheet typical

performance curves taken at higher frequencies used a

harmonic rejection filter between the ADC and the signal

source to eliminate the op amp as the dominant source

of distortion.

The fully-differential configuration yields an analog input

span (AIN+ – AIN–) of ±REFOUT. In this configuration, the

input signal is driven on each AIN pin, typically at equal

spans but opposite polarity. This yields a high common

mode rejection on the input signals. The common mode

voltage of the analog input can be anywhere within the

VDD input range, but will be limited by the peak swing of

the full-range input signal. For example, if the internal ref-

erence is used with VDD = 5VDC, the full-range input span

will be ±4.096V. Half of the input span is typically driven

on each AIN pin, yielding a signal span for each AIN pin of

4.096VP-P. This leaves ~0.9V of common mode variation

tolerance. When using external references, it is possible

to increase common mode tolerance by compressing the

ADC full-range codes into a tighter range. For example,

using an external 2.048V reference with VDD = 5V the

total span would be ±2.048V and each AIN span would

be limited to 2.048VP-P allowing a common mode range

of ~3V. Compressing the input span would incur a SNR

penalty of approximately 2.5dB. Input span compression

Figure 8. Single-Ended to Differential Driver

Figure 9. LT1819 Buffering a Fully-Differential Signal Source

VREF

VREF/2

–

200

LT1819

232116 F08

VREF

–

LT1819

232116 F09

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