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LT1468 Datasheet(PDF) 14 Page - Linear Technology |
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LT1468 Datasheet(HTML) 14 Page - Linear Technology |
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14 / 26 page ![]() LTC2328-16 14 232816fb For more information www.linear.com/LTC2328-16 applicaTions inForMaTion DYNAMIC PERFORMANCE Fast Fourier Transform (FFT) techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algorithm, the ADC’s spectral content can be examined for frequen- cies outside the fundamental. The LTC2328-16 provides guaranteed tested limits for both AC distortion and noise measurements. Signal-to-Noise and Distortion Ratio (SINAD) The signal-to-noise and distortion ratio (SINAD) is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the A/D output. The output is band limited to frequencies from above DC and below half the sampling frequency. Figure 8 shows that the LTC2328-16 achieves a typical SINAD of 93.4dB at a 1MHz sampling rate with a 2kHz input. Signal-to-Noise Ratio (SNR) The signal-to-noise ratio (SNR) is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components except the first five harmonics and DC. Figure 8 shows that the LTC2328-16 achieves a typical SNR of 93.5dB at a 1MHz sampling rate with a 2kHz input. Total Harmonic Distortion (THD) TotalHarmonicDistortion(THD)istheratiooftheRMSsum ofallharmonicsoftheinputsignaltothefundamentalitself. The out-of-band harmonics alias into the frequency band between DC and half the sampling frequency (fSMPL/2). THD is expressed as: THD=20log V22 + V32 + V42 +…+ VN 2 V1 where V1 is the RMS amplitude of the fundamental frequency and V2 through VN are the amplitudes of the second through Nth harmonics. POwER CONSIDERATIONS The LTC2328-16 provides two power supply pins: the 5V power supply (VDD), and the digital input/output interface power supply (OVDD). The flexible OVDD supply allows the LTC2328-16 to communicate with any digital logic operating between 1.8V and 5V, including 2.5V and 3.3V systems. Power Supply Sequencing The LTC2328-16 does not have any specific power supply sequencing requirements. Care should be taken to adhere to the maximum voltage relationships described in the Absolute Maximum Ratings section. The LTC2328-16 has a power-on reset (POR) circuit that will reset the LTC2328-16 at initial power-up or whenever the power supply voltage drops below 2V. Once the supply voltage reenters the nominal supply voltage range, the POR will re-initialize the ADC. No conversions should be initiated until 200μs after a POR event to ensure the re-initialization period has ended. Any conversions initiated before this time will produce invalid results. TIMING AND CONTROL CNV Timing The LTC2328-16 conversion is controlled by CNV. A ris- ing edge on CNV will start a conversion and power up the LTC2328-16. Once a conversion has been initiated, it cannot be restarted until the conversion is complete. Figure 8. 32k Point FFT of the LTC2328-16 FREQUENCY (kHz) –180 –60 –40 –20 –80 –100 –120 –140 –160 0 232816 F08 SNR = 93.5dB THD = –111dB SINAD = 93.4dB SFDR = –115dB 0 100 200 300 500 400 |
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