LTC1921 datasheet(10/24 Pages) LINER

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4251b12f

LTC4251B/LTC4251B-1/

LTC4251B-2

Two modes of operation are possible during the time the

MOSFET is first turning on, depending on the values of

external components, MOSFET characteristics and nomi-

nal design current. One possibility is that the MOSFET

will turn on gradually so that the inrush into the load

capacitance remains a low value. The output will simply

ramp to –48V and the MOSFET will be fully enhanced.

A second possibility is that the load current exceeds the

current limit threshold of 100mV/RS. In this case, the

LTC4251B/LTC4251B-1/LTC4251B-2 will ramp the output

by sourcing 100mV/RS current into the load capacitance.

It is important to set the timer delay so that, regardless

of which start-up mode is used, the start-up time is less

than the TIMER delay time. If this condition is not met,

the LTC4251B/LTC4251B-1/LTC4251B-2 may shutdown

after one TIMER delay.

Board Removal

If the board is withdrawn from the card cage, the UV/OV

divider is the first to lose connection. This shuts off the

MOSFET and commutates the flow of current in the con-

nector. When the power pins subsequently separate, there

is no arcing.

Current Control

Three levels of protection handle short-circuit and over-

load conditions. Load current is monitored by SENSE and

resistor RS. There are three distinct thresholds at SENSE:

50mV for a timed circuit breaker function; 100mV for an

analog current limit loop; and 200mV for a fast, feedfor-

ward comparator which limits peak current in the event

of a catastrophic short-circuit.

If, owing to an output overload, the voltage drop across RS

exceeds 50mV, TIMER sources 230μA into CT.CTeventually

charges to a 4V threshold and the LTC4251B/LTC4251B-1/

LTC4251B-2 latchoff. If the overload goes away and SENSE

measures less than 50mV, CT slowly discharges (5.8μA).

OPERATION

In this way the circuit breaker function will also respond

to low duty cycle overloads, and accounts for fast heating

and slow cooling characteristic of the MOSFET.

Higher overloads are handled by an analog current limit

loop. If the drop across RS reaches 100mV, the current

limiting loop servos the MOSFET gate and maintains a

constant output current of 100mV/RS. Note that because

SENSE > 50mV, TIMER charges CT during this time and

the LTC4251B/LTC4251B-1/LTC4251B-2 will eventually

shut down.

Low impedance failures on the load side of the LTC4251B/

LTC4251B-1/LTC4251B-2 coupled with 48V or more driving

potential can produce current slew rates well in excess of

50A/μs. Under these conditions, overshoot is inevitable. A

fast SENSE comparator with a threshold of 200mV detects

overshoot and pulls GATE low much harder and hence

much faster than can the weaker current limit loop. The

100mV/RS current limit loop then takes over, and servos

the current as previously described. As before, TIMER

runs and latches the LTC4251B/LTC4251B-1/LTC4251B-2

off when CT reaches 4V.

The LTC4251B/LTC4251B-1/LTC4251B-2 circuit breaker

latch is reset by either pulling UV/OV momentarily low, or

dropping the input voltage VIN below the internal UVLO

threshold of 8.2V.

Although short-circuits are the most obvious fault type,

several operating conditions may invoke overcurrent

protection. Noise spikes from the backplane or load, input

steps caused by the connection of a second, higher voltage

supply, transient currents caused by faults on adjacent

circuit boards sharing the same power bus, or the inser-

tion of non-hot swappable products could cause higher

than anticipated input current and temporary detection

of an overcurrent condition. The action of TIMER and CT

rejects these events allowing the LTC4251B/LTC4251B-1/

LTC4251B-2 to “ride out” temporary overloads and distur-

bances that would trip a simple current comparator and

in some cases, blow a fuse.

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