HSP50210 datasheet(13/51 Pages) RENESAS

13 / 51 page

HSP50210

FN3652 Rev.5.00

Page 13 of 51

Jul 2, 2008

There are two techniques for setting a fixed gain for the

AGC. The first is to set Control Word 2 Bit 31 = 1. This

precludes any error update of present AGC gain value. The

second is to set the upper and lower AGC limits to the

desired gain using Figure 9. The upper and lower limits

have the same value for this case.

The HSP50210 provides two mechanisms for monitoring

signal strength. The first, which involved the THRESH

signal, has already been described. The second

mechanism is via the Microprocessor Interface. The 8 most

significant bits of the AGC loop filter output can be read by

a microprocessor. Refer to the “Microprocessor Interface”

on page 27 for details of how to read this value. This AGC

value has the format described in Figure 8.

AGC Bit Weighting and Loop Response

The AGC loop response is a function of the programmable

gain, the bit weightings inherent in the connection of each

element of the loop, the AGC Loop filter limits and the

magnitude of the input gain error step. Table 6 on page 14

details the bit weighting between each element of the AGC

Loop from the error detector through the weighting at the

gain adjuster in the signal path. The AGC Loop Gain sets the

growth rate of the sum in the loop filter accumulator. The

Loop filter output growth rate determines how quickly the

AGC loop traces the transfer function shown previously in

Figure 9. To calculate the rate at which the AGC can adjust

over a given period of time, a gain step is introduced to the

gain error detector and the amount of change that is

observed between clocks at the AGC Level Adjusters

(multipliers) is the AGC response time in dB per symbol.

This AGC loop will respond immediately with the greatest

correction term, then asymptotically approach zero

correction.

We begin calculation of the loop response with a full scale

error detector input of ±1. This error input is scaled by the

Cartesian to Polar converter, the error detector and the AGC

TABLE 4. AGC GAIN MANTISSA TO DECIMAL MAPPING

BINARY CODE

(MMMMMMAGC)

DECIMAL

VALUE

OF AGC

MANTISSA

BINARY CODE

(MMMMMMAGC)

DECIMAL

VALUE

OF AGC

MANTISSA

000000

0.000000

100000

0.500000

000001

0.015625

100001

0.515625

000010

0.031250

100010

0.531250

000011

0.046875

100011

0.546875

000100

0.062500

100100

0.562500

000101

0.078125

100101

0.578125

000110

0.093750

100110

0.593750

000111

0.109375

100111

0.609375

001000

0.125000

101000

0.625000

001001

0.140625

101001

0.640625

001010

0.156250

101010

0.656250

001011

0.171875

101011

0.671875

001100

0.187500

101100

0.687500

001101

0.203125

101101

0.703125

001110

0.218750

101110

0.718750

001111

0.234375

101111

0.734375

010000

0.250000

110000

0.750000

010001

0.265625

110001

0.765625

010010

0.281250

110010

0.781250

010011

0.296875

110011

0.796875

010100

0.312500

110100

0.812500

010101

0.328125

110101

0.828125

010110

0.343750

110110

0.843750

010111

0.359375

110111

0.859375

011000

0.375000

111000

0.875000

011001

0.390625

111001

0.890625

011010

0.406250

111010

0.906250

011011

0.421875

111011

0.921875

011100

0.437500

111100

0.937500

011101

0.453125

111101

0.953125

011110

0.468750

111110

0.968750

011111

0.484375

111111

0.984375

TABLE 5. AGC GAIN EXPONENT TO DECIMAL MAPPING

BINARY CODE

DECIMAL/HEX

EXPONENT

DECIMAL SCALED

EXPONENT

GAIN CONTROL WORD

(8 MSBs OF LOOP FILTER ACCUMULATOR)

GAIN dB

FIGURE 9. GAIN CONTROL TRANSFER FUNCTION

LINEAR ESTIMATE IN dB

GAIN

LINEAR

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