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ICS9FG104 Datasheet(PDF) 10 Page - Integrated Circuit Systems

Part # ICS9FG104
Description  Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks
PDF  15 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9FG104 Datasheet(HTML) 10 Page - Integrated Circuit Systems

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10
Integrated
Circuit
Systems, Inc.
ICS9FG104
0839D—06/02/05
SMBus Table: Byte Count Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
BC7
RW
-
-
0
Bit 6
BC6
RW
-
-
0
Bit 5
BC5
RW
-
-
0
Bit 4
BC4
RW
-
-
0
Bit 3
BC3
RW
-
-
0
Bit 2
BC2
RW
-
-
1
Bit 1
BC1
RW
-
-
1
Bit 0
BC0
RW
-
-
1
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
SMBus Table: M/N Programming Enable
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
M/N_Enable
M/N Prog. Enable
RW
Disable
Enable
0
Bit 6
1
Bit 5
REFOUT_En
REFOUT Enable
RW
Disable
Enable
1
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Reserved
Reserved
Byte 6
Reserved
Reserved
Reserved
Writing to this register
will configure how
many bytes will be
read back, default is
07 = 7 bytes.
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
-
Reserved
Reserved
Reserved
-
-
-
-
Byte 7
-
-
-
-
-
-
-
Byte 8
-
-
-
Reserved
Reserved
Reserved
Reserved
5
-Reserved
Reserved
Byte 9
-
-
-Reserved
Reserved
Reserved
Reserved
-Reserved
-
-
-



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