ISL8502

FN6389 Rev 2.00

Page 13 of 19

June 29, 2010

PGND (Pins 10-13)

These pins are used as the ground connection of the power

train.

PHASE (Pins 14-17)

These pins are the PHASE node connections to the inductor.

These pins are connected to the source of the control

MOSFET and the drain of the synchronous MOSFET.

VIN (Pins 18-21)

Connect the input rail to these pins. These pins are the input to

the regulator as well as the source for the internal linear

regulator that supplies the bias for the IC.

It is recommended that the DC voltage applied to the VIN pins

does not exceed 14V. This recommendation allows for

transient spikes and voltage ringing to occur while not

exceeding Absolute Maximum Ratings.

BOOT (Pin 22)

This pin provides ground referenced bias voltage to the upper

MOSFET driver. A bootstrap circuit is used to create a voltage

suitable to drive the internal N-channel MOSFET. The boot

diode is included within the ISL8502.

PVCC (Pin 23)

This pin is the output of the internal linear regulator that

supplies the bias and gate voltage for the IC. A minimum 4.7µF

decoupling capacitor is recommended.

VCC (Pin 24)

This pin supplies the bias voltage for the IC. This pin should be

tied to the PVCC pin through an RC low pass filter. A 10



resistor and 0.1µF capacitor is recommended.

Functional Description

Initialization

The ISL8502 automatically initializes upon receipt of input

power. The Power-On Reset (POR) function continually

monitors the voltage on the VCC pin. If the voltage on the EN

pin exceeds its rising threshold, then the POR function initiates

soft-start operation after the bias voltage has exceeded the

POR threshold.

Stand Alone Operation

The ISL8502 can be configured to function as a stand alone

single channel voltage mode synchronous buck PWM voltage

regulator. The “Typical Application Schematics” on page 3

show the two configurations for stand alone operation.

The internal series linear regulator requires at least 5.5V to

create the proper bias for the IC. If the input voltage is between

5.5V and 15V, simply connect the VIN pins to the input rail and

the series linear regulator will create the bias for the IC. The

VCC pin should be tied to a capacitor for decoupling.

VCC pin to the input rail. The ISL8502 will use the 5V rail as

the bias. A decoupling capacitor should be placed as close as

possible to the VCC pin.

Multi-Channel (Master/Slave) Operation

The ISL8502 can be configured to function in a multi-channel

system. The “ISL8502 With Multiple Slaved Channels” on

page 4 shows a typical configuration for the multi-channel

system.

In the multi-channel system, each ISL8502 IC regulates a

separate rail while sharing the same input rail. By configuring

the devices in a master/slave configuration, the clocks of each

IC can be synchronized.

There can only be one master IC in a multi-channel system. To

configure an IC as the master, the M/S pin must be shorted to

the VCC pin. The SYNCH pins of all the ISL8502 controller ICs

in the multi-channel system must be tied together. The

must be used on every slave device.

Each slave device must have a 5k

resistor connecting it from

M/S pin to ground.

The master device and all the slave devices can have their EN

pins tied to an enable ‘bus’. Since the EN pin is bi-directional, this

allows for options on how each IC is tied to the enable ‘bus’. If the

EN pin of any ISL8502 is tied directly to the enable bus, then that

device will be capable of disabling all the other devices that have

their EN pins tied directly to the enable bus. If the EN pin of an

ISL8502 is tied to the enable bus through a diode (anode tied to

ISL8502 EN pin, cathode tied to enable bus) then this part will not

disable other devices on the enable bus if it disables itself for any

reason.

If the Master device is disabled via the EN pin, it will continue

to send the clock signal from the SYNCH pin. This allows slave

devices to continue operating.

Fault Protection

The ISL8502 monitors the output of the regulator for overcurrent

and undervoltage events. The ISL8502 also provides protection

from excessive junction temperatures.

OVERCURRENT PROTECTION

The overcurrent function protects the switching converter from a

shorted output by monitoring the current flowing through both

the upper and lower MOSFETs.

Upon detection of any overcurrent condition, the upper

MOSFET will be immediately turned off and will not be turned

on again until the next switching cycle. Upon detection of the

initial overcurrent condition, the Overcurrent Fault Counter is

set to 1 and the Overcurrent Condition Flag is set from LOW to

HIGH. If, on the subsequent cycle, another overcurrent

condition is detected, the OC Fault Counter will be

incremented. If there are eight sequential OC fault detections,

the regulator will be shut down under an Overcurrent Fault

Condition and the EN pin will be pulled LOW. An Overcurrent

Fault Condition will result with the regulator attempting to