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ISL6532BCR Datasheet(PDF) 13 Page - Renesas Technology Corp |
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ISL6532BCR Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 15 page ![]() ISL6532B FN9120 Rev 3.00 Page 13 of 15 Jul 2004 ratings above the maximum input voltage and largest RMS current required by the circuit. Their voltage rating should be at least 1.25 times greater than the maximum input voltage, while a voltage rating of 1.5 times is a conservative guideline. For worst cases, the RMS current rating requirement for the input capacitor of a buck regulator is approximately 1/2 the DC output load current. The maximum RMS current required by the regulator may be closely approximated through the following equation: For a through hole design, several electrolytic capacitors may be needed. For surface mount designs, solid tantalum capacitors can be used, but caution must be exercised with regard to the capacitor surge current rating. These capacitors must be capable of handling the surge-current at power-up. Some capacitor series available from reputable manufacturers are surge current tested. MOSFET Selection - PWM Buck Converter The ISL6532B requires 2 N-Channel power MOSFETs for switching power and a third MOSFET to block backfeed from VDDQ to the Input in S3 Mode. These should be selected based upon rDS(ON), gate supply requirements, and thermal management requirements. In high-current applications, the MOSFET power dissipation, package selection and heatsink are the dominant design factors. The power dissipation includes two loss components; conduction loss and switching loss. The conduction losses are the largest component of power dissipation for both the upper and the lower MOSFETs. These losses are distributed between the two MOSFETs according to duty factor. The switching losses seen when sourcing current will be different from the switching losses seen when sinking current. When sourcing current, the upper MOSFET realizes most of the switching losses. The lower switch realizes most of the switching losses when the converter is sinking current (see the equations below). These equations assume linear voltage- current transitions and do not adequately model power loss due the reverse-recovery of the upper and lower MOSFET’s body diode. The gate-charge losses are dissipated in part by the ISL6532B and do not significantly heat the MOSFETs. However, large gate-charge increases the switching interval, tSW which increases the MOSFET switching losses. Ensure that both MOSFETs are within their maximum junction temperature at high ambient temperature by calculating the temperature rise according to package thermal-resistance specifications. A separate heatsink may be necessary depending upon MOSFET power, package type, ambient temperature and air flow. IRMS MAX VOUT VIN ---------------- IOUT MAX 2 1 12 ------ VIN VOUT – Lfsw -------------------------------- VOUT VIN ---------------- 2 + = PLOWER = Io2 x rDS(ON) x (1 - D) Where: D is the duty cycle = VOUT / VIN, tSW is the combined switch ON and OFF time, and fs is the switching frequency. Approximate Losses while Sourcing current Approximate Losses while Sinking current PLOWER Io 2 rDS ON 1D – 1 2 --- Io VIN tSW fs + = PUPPER Io 2 rDS ON D 1 2 --- Io VIN tSW fs + = PUPPER = Io2 x rDS(ON) x D |
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