MP2624GL datasheet(28/45 Pages) MPS

28 / 45 page

MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG

MP2624 Rev.1.05

www.MonolithicPower.com

4/9/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

The MP2624 monitors continuously the voltage

at VIN_OTG in OTG boost mode. Once the VIN

exceeds VOTG_OVP, the MP2624 stops switching,

and a corresponding fault register is set high to

indicate the fault.

In boost mode, the MP2624 employs a fixed

1.5MHz PWM step-up switching regulator. It

switches from PWM operation to pulse-skipping

operation at light load.

OTG Output CC Mode

When in the OTG mode, the load at the VIN has

current limit, which could be set via the I2C

REG02H Bit[1:0], high to 2A. MP2624 could

operates in CC mode when the current limit is

reached while the VIN voltage does not drop to

the

over

load

short

circuit

threshold

(<VBATT+100mV) as shown in Figure 15.

Therefore, MP2624 not only has the CC mode

during the charging process, but also has CC

mode operation in OTG mode for various

applications.

Figure 15. OTG Output U-I Curve

Impedance

Compensation

Accelerate

Charging

Throughout the charging cycle, the constant-

voltage charging stage occupies larger ratios. To

accelerate the charging cycle, it is better to have

the charging remain in the constant-current

charge stage as long as possible.

MP2624 allows the user to compensate the

intrinsic resistance of the battery by adjusting the

charge full voltage threshold, according to the

charge current and internal resistance. In

addition, a maximum allowed regulated voltage is

set for the sake of the safety condition. See

Equation (2):



BATT _ REG

BATT _ FULL

CHG _ ACT

BAT _ CMP

CLAMP

Min I

, V





(2)

Where VBATT_REG is the battery regulation voltage,

VBATT_FULL is the charge full voltage set via the I

REG04 Bit [7:2]; ICHG_ACT is the real-time charge

current during the operation; RBAT_CMP is the

compensated resistor to simulate the resistor of

the connection wire of the battery (it is selected

through the REG06 Bit[7:5]), and VCLAMP is the

battery compensation voltage clamp (above

VBATT_FULL); it is selected via the REG06 Bit[4:2].

Sleep Mode

When the input power source is missing and

OTG is disabled, the MP2624 will transition into

sleep mode. During sleep mode, the battery

powers the internal circuit, and the internal VREF

LDO is turned off. The system is connected to

the battery through the battery FET, and IN is

bridged off from SYS by the reverse blocking

FET. In order to extend the battery life during

shipping and storage, the MP2624 can turn off

the battery FET to minimize leakage.

Series Interface

The MP2624 family uses an I2C compatible

interface for flexible charging parameters setting

and instantaneous device status reporting. I2CTM

is a bidirectional 2-wire serial interface developed

Philips

Semiconductor

(now

NXP

Semiconductors). Only two bus lines are required:

a serial data line (SDA) and a serial clock line

(SCL). The device can be considered a master or

a slave when performing data transfers. A master

is the device which initiates a data transfer on the

bus and generates the clock signals to permit the

transfer. At that time, any device addressed is

considered a slave.

The device operates as a slave device with the

address 4BH, receiving control inputs from the

master device, like a micro controller or a digital

signal processor.

The I2C interface supports both standard mode

(up to 100k bits), and fast mode (up to 400k bits).

Both SDA and SCL are bi-direction lines,

connecting to the positive supply voltage via a

current source or pull-up resistor. When the bus

is free, both lines are high. SDA and SCL are

open drains.

The data on the SDA line must be stable during

the high period of the clock. The high or low state

of the data line can change only when the clock

signal on the SCL line is low. One clock pulse is

generated for each data bit transferred (see

Figure 16).

MP2624GL Datasheet(PDF) 28 Page - Monolithic Power Systems

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