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LSF0102 Datasheet(PDF) 9 Page - Texas Instruments |
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LSF0102 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 18 page ![]() SW SW LSF0102-Q1 8 6 2 7 3 4 5 EN B1 B2 A2 A1 Vref_A Vref_B 1 GND 9 LSF0102-Q1 www.ti.com SDLS969 – MAY 2018 Product Folder Links: LSF0102-Q1 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The LSF0102-Q1 device can be used in level translation applications for interfacing devices or systems operating at different interface voltages. The LSF0102-Q1 device is ideal for use in applications where an open-drain driver is connected to the data I/Os. With appropriate pull-up resistors and layout, the LSF0102-Q1 device can achieve 100 MHz. The LSF0102-Q1 can also be used in applications where a push-pull driver is connected to the data I/Os. 8.2 Functional Block Diagrams Figure 6. LSF0102-Q1 Functional Block Diagram 8.3 Feature Description 8.3.1 Auto Bidirectional Voltage Translation The LSF0102-Q1 device is an auto bidirectional voltage level translator that operates from 0.95 to 4.5 V on Vref_A and 1.8 to 5.5 V on Vref_B. This allows bidirectional voltage translation between 0.95 V and 5.5 V without the need for a direction pin in open-drain or push-pull applications. The LSF0102-Q1 device supports level translation applications with transmission speeds greater than 100 Mbps for open-drain systems using a 250-Ω pullup resistor with a 30-pF capacitive load. 8.3.2 Output Enable When EN is HIGH, the translator switch is on, and the An I/O is connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. To enable the I/O pins, the EN input should be tied directly to Vref_B. To ensure the high- impedance state during power-up or power-down, EN must be LOW. For additional details on how to use the enable pin, see the Using the Enable Pin with the LSF Family video. (1) EN is controlled by Vref_B logic levels and should be at least 1 V higher than Vref_A for best translator. Table 1. Enable Function Table INPUT EN(1) PIN FUNCTION Tied directly to Vref_B An = Bn L Hi-Z 8.3.3 Mixed-Mode Voltage Translation The supply voltage (Vpu#) for each channel can be individually set up with a pull-up resistor. For example, CH1 can be used in up-translation mode (1.2 V ↔ 3.3 V) and CH2 in down-translation mode (2.5 V ↔ 1.8 V). For additional details on how to use the LSF0102-Q1 for mixed-mode voltage translation, see the Multi-Voltage Translation with the LSF Family video. |
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