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ISL6534CVZ Datasheet(PDF) 21 Page - Renesas Technology Corp

Part # ISL6534CVZ
Description  Dual PWM with Linear
PDF  29 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL6534CVZ Datasheet(HTML) 21 Page - Renesas Technology Corp

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ISL6534
FN9134 Rev 2.00
Page 21 of 29
Nov 18, 2005
Figure 20 shows the upper gate drive supplied by a direct
connection to VCC12. This option should only be used in
converter systems where the main input voltage is +5 VDC
or less. The peak upper gate-to-source voltage is
approximately VCC12 less the input supply. For +5V main
power and +12 VDC for the VIN bias, the gate-to-source
voltage of Q1 is 7V. A logic-level MOSFET may be a good
choice for Q1 (again, check the max gate voltage ratings)
and a logic-level MOSFET can be used for Q2 if its absolute
gate-to-source voltage rating exceeds the maximum voltage
applied to VCC12.
Bootstrap Trade-offs
Bootstrapping to 12V requires that the upper FET have a
maximum gate-source rating of greater than 12V. Since the
LGATE output is sourced from the VCC12 supply in all
cases, the lower FET must also have the high rating. So this
may rule out using some 20V breakdown FETs that have
gate ratings of 12V or less.
Figure 19 shows the diode DBOOT and bootstrap capacitor
CBOOT. A small capacitor (~1µF; not shown) is sometimes
used as a local decoupling cap to GND; it should be placed
near the anode of the diode to GND.
The anode of the diode is shown tied to VCC12, but it can
also connect to VCC (even in the shunt regulator mode in
some cases) or to VIN or to another appropriate supply. If
the shunt voltage is used for bootstrapping, it does increase
the current used in the shunt; check that the shunt voltage is
not affected; if it is, a lower value of shunt resistor may be
necessary.
Figure 20 shows the direct hookup; the advantage is that two
components (DBOOT and CBOOT) are not needed; a
possible disadvantage is that the VCC12 may not be the
optimum voltage for efficiency (perhaps a bootstrap
diode/capacitor to 5V would be better, for example).
The PHASE node is not brought into the ISL6534, so there is
no way to reference the gate voltage to it, as is often done in
other regulators. The considerations for the BOOT2 pin are
identical to BOOT1; but since they may have different VIN,
VOUT, FETs, etc., the preferred solution for each output may
be different for any given system.
The voltage required on VBOOT (Bootstrap Voltage; the
diode anode) depends primarily on the upper NFET rDS(ON)
and Vth. A high voltage makes the rDS(ON) as low as
possible, which should help the overall efficiency; however,
the high voltage makes the switching power in the gate
driver higher, which lowers the efficiency. So the net overall
effect is a trade-off between the two. At the other extreme, a
low voltage must be at least as high as the FET threshold
voltage, plus a few volts of overdrive, in order to turn on the
NFET hard enough to source the maximum load current. So
the rDS(ON) is not as low, hurting the efficiency, but the gate
driver power is lower, which helps the efficiency.
Since the gate driver power is a function of (voltage)2, the
theoretical optimum VBOOT voltage is to make it only high
enough to turn on the NFET to handle the maximum load.
However, since there are usually only a few available power
supplies to choose from, the user often must compromise.
And sometimes the only supply available is the same one
used for VIN, which may be good for one term, but not as
good for the other.
The size of the bootstrap capacitor can be chosen by using
the following equations:
The last equation plugs in some typical values: N = 1; QG is
33nC, VIN is 12V, VGS is 11V, Vmax = 1V. In this example,
CBOOT  0.051µF. This value is often rounded up to 0.1µF
as a starting value. The bootstrap capacitors usually need to
be rated at 16V, to handle the typical 12V boot.
In general, as the number of FETs or the size of the FETs
increases (which usually makes QG larger) or if VIN or the
bootstrap supply (if not VIN) increases (for example, from 5V
to 12V), these all require that CBOOT become larger.
FIGURE 20. UPPER GATE DRIVE - DIRECT VCC12 DRIVE
OPTION
+12V
PGND
LGATE
UGATE
PHASE
BOOT
VCC12
+5V OR LESS
NOTE:
VG-S  VCC12 - 5V
NOTE:
VG-S  VCC12
Q1
Q2
VCC12
D2 (OPTIONAL)
ISL6534
GND
+
-
PGND
(CHANNEL
1 OR 2)
CBOOT
QGATE
V
--------------------
QGATE
NQG VIN
VGS
-----------------------------------
=
CBOOT
QGATE
V
--------------------
NQG VIN
VGS V
-----------------------------------
13312
11 0.7
----------------------------
0.051
F
=
=
=
where
N is the number of upper FETs
QG is the total gate charge per upper FET
VIN is the input voltage
VGS is the gate-source voltage (usually VIN - diode drop)
V is the change in boot voltage before and immediately
after the transfer of charge; typically 0.7V to 1.0V
and



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