CS61582 datasheet(12/32 Pages) CIRRUS

12 / 32 page

lected by the 1XCLK pin. In systems with a jit-

tered transmit clock, the reference clock should

not be tied to the transmit clock and a separate

external oscillator should drive the reference

clock input. Any jitter present on the reference

clock will not be filtered by the jitter attenuator.

POWER-UP RESET

On power-up, the device is held in a static state

until the power supply achieves approximately

60% of the power supply voltage. When this

threshold is crossed, the device waits another 10

ms to allow the power supply to reach operating

voltage and then calibrates the transmit and re-

ceive circuitry. This initial calibration takes less

than 20 ms but can occur only if REFCLK and

TCLK are present. The power-up reset performs

the same functions as the RESET pin.

LINE CONTROL AND MONITORING

Line control and monitoring of the CS61582 is

achieved using the control pins. The controls and

indications available on the CS61582 are de-

tailed below.

Device Performance Monitor

To aid in the early detection and easy isolation

of non-functioning links, the CS61582 is capable

of monitoring the transmit driver performance

and report when the driver is no longer opera-

tional. The driver performance monitor consists

of an activity detector that monitors the transmit-

ted signal when MTIP is connected to TTIP and

MRING is connected to TRING. The DPM out-

put will go high when the differential inputs

MTIP and MRING are inactive for 512

±2

REFCLK periods. The DPM output returns low

when the monitor senses a minimum 12.5% ones

density signal over 175

±75 bit periods with no

more than 100 consecutive zeros. To increase the

reliability of the performance monitor, it is sug-

gested that the monitor inputs of one channel be

connected the transmitter output pins of another

channel or device.

Loss of Signal

The loss of signal (LOS) indication is detected

by the receiver and reported by setting the LOS

pin high. Loss of signal is indicated when

175

±15 consecutive zeros are received. The LOS

condition is exited according to the ANSI

T1.231-1993 criteria that requires 12.5% ones

density over 175

±75 bit periods with no more

than 100 consecutive zeros. Note that bit errors

may occur at RPOS and RNEG prior to the LOS

indication if the analog input level falls below

the receiver sensitivity.

The LOS pin is set high when the device is reset

or in power-up and returns low when data is re-

covered by the receiver.

Transmit All Ones

Transmit all ones is selected by setting the

TAOS pin high. Selecting TAOS causes continu-

ous ones to be transmitted to the line interface

on TTIP and TRING at the frequency of

REFCLK. In this mode, the transmit data inputs

TPOS and TNEG are ignored. A TAOS request

overrides the data transmitted to the line inter-

face during local and remote loopbacks.

Local Loopback

A local loopback is selected by setting the

LLOOP pin high. Selecting LLOOP causes the

TCLK, TPOS, and TNEG inputs to be looped

back through the jitter attenuator to the RCLK,

RPOS, and RNEG outputs. Data received at the

line interface is ignored, but data at TPOS and

TNEG continues to be transmitted to the line in-

terface at TTIP and TRING.

A TAOS request overrides the data transmitted to

the line interface during local loopback. Note

that simultaneous selection of local and remote

loopback modes is not valid.

DS224PP1

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