CY7C09159-7AI datasheet(2/15 Pages) CYPRESS

2 / 15 page

CY7C09159

CY7C09169

PRELIMINARY

Functional Description

The CY7C09159 and CY7C09169 are high speed synchro-

nous CMOS 8K and 16K x 9 dual-port static RAMs. Two ports

are provided, permitting independent, simultaneous access for

reads and writes to any location in memory.[2] Registers on

control, address, and data lines allow for minimal set-up and

hold times. In pipelined output mode, data is registered for

decreased cycle time. Clock to data valid tCD2 = 6.5 ns (pipe-

lined). Flow-through mode can also be used to bypass the

pipelined output register to eliminate access latency. In

flow-through mode data will be available tCD1 = 15 ns after the

address is clocked into the device. Pipelined output or

flow-through mode is selected via the FT/Pipe pin.

Each port contains a burst counter on the input address regis-

ter. The internal write pulse width is independent of the LOW-

to-HIGH transition of the clock signal. The internal write pulse

is self-timed to allow the shortest possible cycle times.

A HIGH on CE0 or LOW on CE1 for one clock cycle will power

down the internal circuitry to reduce the static power consump-

tion. The use of multiple Chip Enables allows easier banking

of multiple chips for depth expansion configurations. In the

pipelined mode, one cycle is required with CE0 LOW and CE1

HIGH to reactivate the outputs.

Counter enable inputs are provided to stall the operation of the

address input and utilize the internal address generated by the

internal counter for fast interleaved memory applications. A

port’s burst counter is loaded with the port’s address strobe

(ADS). When the port’s count enable (CNTEN) is asserted, the

address counter will increment on each LOW-to-HIGH transis-

tion of that port’s clock signal. This will read/write one word

from/into each successive address location until CNTEN is

deasserted. The counter can address the entire memory array

and will loop back to the start. Counter reset (CNTRST) is used

to reset the burst counter.

All parts are available in 100-pin Thin Quad Plastic Flatpack

(TQFP) packages.

Note:

When simultaneously writing to the same location, final value cannot be guaranteed.

CY7C09159-7AI Datasheet(PDF) 2 Page - Cypress Semiconductor