PIC1F628 datasheet(138/170 Pages) MICROCHIP

138 / 170 page

PIC16F62X

DS40300C-page 136

Preliminary

 2003 Microchip Technology Inc.

TABLE 17-4:

EXTERNAL CLOCK TIMING REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

Fosc

External CLKIN Frequency(1)

—

MHz XT and ER Osc mode,

DD = 5.0V

—

MHz HS Osc mode

—

200

kHz

LP Osc mode

Oscillator Frequency(1)

—

MHz ER Osc mode, V

DD = 5.0V

0.1

—

MHz XT Osc mode

1—

—

200

MHz

kHz

HS Osc mode

LP Osc mode

3.65

4.28

MHz INTRC mode (fast), V

DD = 5.0V

kHz

INTRC mode (slow)

INTRC Internal Calibrated RC

3.65

4.00

4.28

MHz V

DD = 5.0V

External Biased ER Frequency

10 kHz

8 MHz

DD = 5.0V

Tosc

External CLKIN Period(1)

250

—

XT and ER Osc mode

—

HS Osc mode

5—

—

µsLP Osc mode

Oscillator Period(1)

250

—

ER Osc mode

250

—

10,000

XT Osc mode

—

1,000

HS Osc mode

µsLP Osc mode

250

INTRC mode (fast)

µs INTRC mode (slow)

Tcy

Instruction Cycle Time

1.0

CY = 4/FOSC

TosL,

TosH

External CLKIN (OSC1) High

External CLKIN Low

100 *

—

XT oscillator, T

OSC L/H duty

cycle*

These parameters are characterized but not tested.

† Data in “Typ” column is at 5.0V, 25

°C unless otherwise stated. These parameters are for design guidance only

and are not tested.

Note 1: Instruction cycle period (Tcy) equals four times the input oscillator time-based period. All specified values

are based on characterization data for that particular oscillator type under standard operating conditions

with the device executing code. Exceeding these specified limits may result in an unstable oscillator

operation and/or higher than expected current consumption. All devices are tested to operate at “Min.”

values with an external clock applied to the OSC1 pin. When an external clock input is used, the “Max”

cycle time limit is “DC” (no clock) for all devices.

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