ST7036 datasheet(11/72 Pages) ETC

11 / 72 page

ST7036

V1.1

2003/12/24

11/72

Pin Function

Name

Number

I/O Interfaced with

Function

XRESET

MPU

External reset pin. Only if the power on reset be used, the

XRESET pin could be fixed to VDD.

Low active.

MPU

Select registers.

0: Instruction register (for write)

Busy flag & address counter (for read)

1: Data register (for write and read)

R/W

MPU

Select read or write(In parallel mode).

0: Write

1: Read

MPU

Starts data read/write. (“E” must connect to “VDD” when

serial mode is selected.)

CSB

MPU

Chip select in parallel mode and serial interface(Low

active). When the CSB in falling edge state ( in serial

interface ), the shift register and the counter are reset.

DB0~DB3 are four low order bi-directional data bus pins.

DB0~DB3 are used for data transfer and receive between

the MPU and the ST7036.

These pins are not used during 4-bit operation and must

connect to VDD.

DB4~DB7 are four high order bi-directional data bus pins.

DB4~DB7 are used for data transfer and receive between

the MPU and the ST7036. DB7 can be used as a busy flag.

In serial interface mode DB7 is SI(input data),DB6 is

SCL(serial clock).

DB0 to DB7

I/O

MPU

In I

2C interface DB7 is slave address A1, DB6 is slave

address A0, DB5 DB4 DB3 are SDA –out, DB2 DB1 are

SDA-in and D0 is SCL.

SDA and SCL must connect to I

2C bus ( I2C bus means that

connecting a resister between SDA/SCL and the power of

2C bus ).

Ext

ITO option

Extension instruction select:

0:enable extension instruction(add contrast/ICON/double

height font/ extension instruction)

1:disable extension instruction(compatible to ST7066U, but

without 5x11dot font)

PSB

MPU

Interface selection

0:serial mode

(“E” must connect to “VDD” when serial mode is selected.)

1:parallel mode(4/8 bit)

In I

2C interface PSB must connect to VDD

PSI2B

ITO option

PSB

PSI2B

Interface

No use

SI4

SI2 ( I

2C )

Parallel 68

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