3.3 V

V

DD

V

DD

RESET

TPS3820-33-Q1

Microprocessor

MR

WDI

I/O

GND

GND

RESET

0

6

200

400

600

800

4

2

0

1000

8

10

WDI = Open

MR = Open

TPS3820-33-Q1, TPS3820-50-Q1, TPS3823-25-Q1

TPS3823-30-Q1, TPS3823-33-Q1, TPS3823-50-Q1, TPS3824-30-Q1, TPS3824-33-Q1

TPS3824-50-Q1, TPS3825-33-Q1, TPS3825-50-Q1, TPS3828-33-Q1, TPS3828-50-Q1

SGLS143C – DECEMBER 2002 – REVISED DECEMBER 2015

www.ti.com

Typical Applications (continued)

9.2.1.2 Detailed Design Procedure

Determine which version of the TPS382x-xx-Q1 family best suits the functional performance required.

If the input supply is noisy, include an input capacitor to help avoid unwanted changes to the reset signal.

9.2.1.3 Application Curve

9.2.2 Decoupling WDI During Reset Event

If the application requires that the input to WDI is active when the reset signal is asserted, Figure 11 shows how

to decouple WDI from the active signal using an N-channel FET. The N-channel FET is placed in series with the

WDI pin, with the gate of the FET connected to the RESET output.

Figure 11. WDI Example

10 Power Supply Recommendations

These devices are designed to operate from an input supply with a voltage range from 1.1 V to 5.5 V. Though

not required, it is good analog design practice to place a 0.1-

input supply is noisy.

12

Submit Documentation Feedback

Copyright © 2002–2015, Texas Instruments Incorporated

Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-

50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1

TPS3828-50-Q1