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PEX8605 Datasheet(PDF) 3 Page - PLX Technology

Part # PEX8605
Description  4-lane, 4-port PCIe Gen2 switch Integrate 5.0 GT/s SerDes
PDF  3 Pages
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Manufacturer  PLX [PLX Technology]
Direct Link  http://www.plxtech.com
Logo PLX - PLX Technology

PEX8605 Datasheet(HTML) 3 Page - PLX Technology

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PEX8605, PCI Express Gen 2 Switch, 4 Lanes, 4 Ports
© PLX Technology, www.plxtech.com
Page 3 of 3
8/17/2011, Version 1.1
different data rates (2.5GT/s vs 5.0GT/s) is required to sustain
the performance of the faster device. Figure 5 provides an
example where the PEX8605 is configured as x2, x1, x1. In this
example, the x2 link is running at the lower data rate (2.5GT/s)
while a single x1 port is running at the higher data rate (5.0
GT/s). In this usage model, the PEX8605 acts as a bridge
between Gen 1 and Gen 2 devices allowing the faster device to
operate at its full bandwidth capabilities.
Figure 5. Gen 1 to Gen 2 Bandwidth Bridge
Software Usage Model
From a system model viewpoint, each PCI Express port is a
virtual PCI to PCI bridge device and has its own set of PCI
Express configuration registers. It is through the upstream port
that the BIOS or host can configure the other ports using
standard PCI enumeration. The virtual PCI-to-PCI bridges
within the PEX8605 are compliant to the PCI and PCI Express
system models. The Configuration Space Registers (CSRs) in a
virtual primary/secondary PCI-to-PCI bridge are accessible by
type 0 configuration cycles through the virtual primary bus
interface (matching bus number, device number, and function
number).
Interrupt Sources/Events
The PEX8605 supports the INTx interrupt message type
(compatible with PCI 2.3 Interrupt signals) or Message Signaled
Interrupts (MSI) when enabled. Interrupts/messages are
generated by PEX8605 for Hot-Plug events, doorbell interrupts,
baseline error reporting, and advanced error reporting.
Development Tools
PLX offers hardware and software tools to enable rapid
customer design activity. These tools consist of a hardware
module (PEX8605 RDK), hardware documentation (available at
www.plxtech.com), and a Software Development Kit (also
available at www.plxtech.com).
ExpressLane PEX8605 RDK
The PEX8605 RDK is a hardware module containing the
PEX8605 which plugs right into your system. The PEX8605
RDK can be used to test and validate customer software, or used
as an evaluation vehicle for PEX8605 features and benefits. The
PEX RDK provides everything that a user needs to get their
hardware and software development started.
Figure 6. PEX8605 Rapid Development Kit
Software Development Kit (SDK)
PLX’s Software Development Kit is available for download at
www.plxtech.com/sdk. The software development kit includes
drivers, source code, and interfaces to aid in configuring and
debugging the PEX8605.
Both performancePAK and visionPAK are supported by PLX’s
RDK and SDK, the industry’s most advanced hardware- and
software-development kits.
Product Ordering Information
Part Number
Description
PEX8605-AA50NI G
4 Lane, 4 Port PCI Express Gen
2.0 Switch, Pb-Free (10x10mm
2
PEX8605-AA RDK
aQFN)
PEX 8605 Rapid Development Kit
+ CM108 (one x1 upstream port,
three x1 downstream ports)
PEX 8605-AA-2U1D
RDK
PEX 8605 Rapid Development Kit
+ CM107 (one x2 upstream port,
two x1 downstream ports)
PLX Technology, Inc. All rights reserved. PLX, the PLX logo, ExpressLane,
Read Pacing, Dual Cast, performancePAK and visionPAK are trademarks of
PLX Technology, Inc. All other product names that appear in this material are
for identification purposes only and are acknowledged to be trademarks or
registered trademarks of their respective companies. Information supplied by
PLX is believed to be accurate and reliable, but PLX assumes no responsibility
for any errors that may appear in this material. PLX reserves the right, without
notice, to make changes in product design or specification.
Visit www.plxtech.com for more information.
PEX 8605
Gen 2
Gen 1
x2
x1
Bandwidth
Bridge
2.5 GT/s
5.0 GT/s
PEX8518
EEPROM
DIP switch
for cfg.
JTAG
Header
RefClk
HD Power
Connector
x1
PERST#
PORT 2 – X1
PORT 3 – X1
Manual
Reset
(Upstream Port)
Lane Status
LEDs
PORT 1 – X1
Reset
Ckt.
I2C
PEX
8518
PEX 8605



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