MDS 2309 D

4

Revision 052405

In te gr ated Circuit Systems

ICS2309

DC Electrical Characteristics

ICS2309M-1, VDD = 3.3 V ±10%, Ambient Temperature -40 to +85

°C(Industrial), (0-70°C Commercial)

Note 1: When there is no clock signal present at CLKIN, the ICS2309 will enter power down mode. The

PLL is stopped and the outputs are tri-state.

AC Electrical Characteristics

ICS2309M-1, VDD=3.3 V ±10%, Ambient temperature -40 to +85

°C(Industrial), (0-70°C Commercial),

Note 2: With VDD at a steady rate and valid input at CLKIN

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Operating Voltage

VDD

3.0

3.6

V

Input High Voltage

2V

Input Low Voltage

0.8

V

Input Low Current

VIN = 0V

50

µA

Input High Current

VIN = VDD

100

µA

Output High Voltage

2.4

V

Output Low Voltage

0.4

V

Operating Supply Current

IDD

No Load

32

mA

Power Down Supply

Current

CLKIN = 0, Note 1

12

µA

Short Circuit Current

Each output

±50

mA

Input Capacitance

S2, S1, CLKIN

5

pF

Parameter

Symbol

Conditions

Min.

Typ. Max. Units

Output Clock Frequency

10 pF load, See table on page 2

10

133

MHz

Output Clock Frequency

30 pF load, See table on page 2

10

100

MHz

Output Rise Time

0.8 to 2.0 V, outputs loaded

2.5

ns

Output Fall Time

2.0 to 0.8 V, outputs loaded

2.5

ns

Output Clock Duty Cycle

measured at 1.4V, Fout=66.67

MHz

40

50

60

%

Output Clock Duty Cycle

measured at 1.4V, Fout=50

MHz

45

50

55

%

Device to Device Skew

rising edges at VDD/2

700

ps

Output to Output Skew

rising edges at VDD/2

250

ps

Input to Output Skew

rising edges at VDD/2

±350

ns

Input to Output Skew

rising edges at VDD/2, S2= 1,

S1 = 0

15

8.7

ns

Cycle to Cycle Jitter

measured at 66.67M, outputs

loaded

200

ps

PLL Lock Time

Note 2

1.0

ms