STV0684 datasheet(18/49 Pages) STMICROELECTRONICS

18 / 49 page

Functional Description

STV0684

18/49

3.5

Memory interface

Description

The memory control Block provides dedicated support for embedded SRAM, external SDRAM,

NAND, Smartmedia and Compact Flash (via SFP pins).

Embedded SRAM

● Full-speed random read/write access from the ST20 to embedded SRAM

● Full-speed embedded SRAM address generation for real-time data writes from the compression

engine, the Video Processor block, SPI, the audio block and the USB module

● Full-speed embedded SRAM address generation for data reads to the DMA out FIFO

Selection of the source/destination modules is managed by firmware.

External SDRAM

● ST20 memory mapped accesses to external SDRAM

● Full-speed embedded SDRAM address generation for real-time data writes from VDFIF (for VC

and VP modules) or DMA out FIFO

● Full-speed external SDRAM address generation/control to DMA out FIFO, TV FIFO, LCD FIFO

or VP FIFO’s

● Operation with PC100 (or better e.g. PC133) and JEDEC Standard No. 21-C compliant devices

and supports 64MB, 128MB, 256MB and 512MB parts with a 16-bit bus width

Mass storage media support

● Compact-flash support

● SmartMedia Card support

● NAND flash memory with a 512B+16 page organization, ECC done by hardware, 32Mbit to

1Gbit devices

● Support for Multi-Media card and Secure Digital with the SPI interface

STV0684 Datasheet(PDF) 18 Page - STMicroelectronics