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AD2428W Datasheet(PDF) 1 Page - Analog Devices |
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AD2428W Datasheet(HTML) 1 Page - Analog Devices |
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1 / 2 page ![]() Data Sheet A2B and the A2B logo are registered trademarks of Analog Devices, Inc. Automotive Audio Bus A2B Transceiver AD2426W/AD2427W/AD2428W Rev. Sp0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com A2B BUS FEATURES Line topology Single master, multiple slave Up to 15 m between nodes and up to 40 m overall cable length Communication over distance Synchronous data Multichannel I 2S/TDM to I2S/TDM Clock synchronous, phase aligned in all nodes Low latency slave to slave communication Control and status information I 2C to I2C GPIO over distance Bus power or local power slave nodes Configurable with SigmaStudio graphical software tool Qualified for automotive applications A2B TRANSCEIVER FEATURES Configurable as A 2B bus master or slave (AD2428W) I 2C interface 8-bit to 32-bit multichannel I 2S/TDM interface I 2S/TDM/PDM programmable data rate Up to 32 upstream and 32 downstream channels PDM inputs for 4 high dynamic range microphones on mas- ters or slaves Support for receiving I 2S data on nodes with up to 4 PDM microphones Unique ID register for each transceiver Support for crossover or straight-through cabling Programmable settings to optimize EMC performance APPLICATIONS Automotive audio communication link Active noise cancellation Microphone arrays for hands free and in car communication Figure 1. Functional Block Diagram A2B TRX B (Towards Master) VREG1 I2C PLL BCLK/PDMCLK DTX0/DTX1 IRQ/IO0 DRX0/DRX1 SYNC SDA SCL ADR1/IO1/CLKOUT1 IOVDD A2B TRX A (Towards Last Slave) BCM AP ACM BN DVDD ATRXVDD/BTRXVDD PLLVDD VSS SWP VIN VOUT1 ADR2/IO2/CLKOUT2 VREG2 VOUT2 VSSN AN BP SENSE DIAGNOSTICS ® I2S/TDM PDM IO7 |
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