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MMPF0100Z Datasheet(PDF) 117 Page - NXP Semiconductors

Part # MMPF0100Z
Description  14 channel configurable power management integrated circuit
PDF  128 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100Z Datasheet(HTML) 117 Page - NXP Semiconductors

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NXP Semiconductors
117
PF0100Z
TYPICAL APPLICATIONS
7.2
PF0100Z layout guidelines
7.2.1
General board recommendations
1. It is recommended to use an eight layer board stack-up arranged as follows:
• High current signal
•GND
• Signal
•Power
•Power
• Signal
•GND
• High current signal
2. Allocate TOP and BOTTOM PCB Layers for POWER ROUTING (high current signals), copper-pour the unused area.
3. Use internal layers sandwiched between two GND planes for the SIGNAL routing.
7.2.2
Component placement
It is desirable to keep all component related to the power stage as close to the PMIC as possible, specially decoupling input and output
capacitors.
7.2.3
General routing requirements
1. Some recommended things to keep in mind for manufacturability:
•
Via in pads require a 4.5 mil minimum annular ring. Pad must be 9.0 mils larger than the hole
•
Maximum copper thickness for lines less than 5.0 mils wide is 0.6 oz copper
•
Minimum allowed spacing between line and hole pad is 3.5 mils
•
Minimum allowed spacing between line and line is 3.0 mils
2. Care must be taken with SWxFB pins traces. These signals are susceptible to noise and must be routed far away from power,
clock, or high power signals, like the ones on the SWxIN, SWx, SWxLX, SWBSTIN, SWBST, and SWBSTLX pins. They could be
also shielded.
3. Shield feedback traces of the regulators and keep them as short as possible (trace them on the bottom so the ground and power
planes shield these traces).
4. Avoid coupling traces between important signal/low noise supplies (like REFCORE, VCORE, VCOREDIG) from any switching node
(i.e. SW1ALX, SW1BLX, SW1CLX, SW2LX, SW3ALX, SW3BLX, SW4LX, and SWBSTLX).
5. Make sure all components related to a specific block are referenced to the corresponding ground.
Miscellaneous
0.1
μF
1
10 V X5R 0402
CD402C104K8PAC
Kemet
VDDIO
1.0
μF
1
10 V X5R 0402
CC0402KRX5R6BB105
Yageo America
VIN
100 k
Ω
1
1/16 W 0402
RK73H1ETTP1003F
KOA SPEER
PWRON
100 k
Ω
1
1/16 W 0402
RK73H1ETTP1003F
KOA SPEER
RESETBMCU
100 k
Ω
1
1/16 W 0402
RK73H1ETTP1003F
KOA SPEER
SDWN
100 k
Ω
1
1/16 W 0402
RK73H1ETTP1003F
KOA SPEER
INTB
Notes
82.
NXP does not assume liability, endorse, or warrant components from external manufacturers referenced in circuit drawings or tables. While NXP
offers component recommendations in this configuration, it is the customer’s responsibility to validate their application.
Table 138. Bill of materials (82) (continued)
Value
Qty
Description
Part#
Manufacturer
Component/pin



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