MMPF0100Z datasheet(118/128 Pages) NXP

118 / 128 page

118

NXP Semiconductors

PF0100Z

TYPICAL APPLICATIONS

7.2.4

Parallel routing requirements

1. I2C signal routing

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CLK is the fastest signal of the system, so it must be given special care.

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To avoid contamination of these delicate signals by nearby high power or high frequency signals, it is a good practice to

shield them with ground planes placed on adjacent layers. Make sure the ground plane is uniform throughout the whole

signal trace length.

Figure 30. Recommended shielding for critical signals.

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These signals can be placed on an outer layer of the board to reduce their capacitance with respect to the ground plane.

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Care must be taken with these signals not to contaminate analog signals, as they are high frequency signals. Another good

practice is to trace them perpendicularly on different layers, so there is a minimum area of proximity between signals.

7.2.5

Switching regulator layout recommendations

1. Per design, the switching regulators in PF0100Z are designed to operate with only one input bulk capacitor. However, it is

recommended to add a high-frequency filter input capacitor (CIN_hf), to filter out any noise at the regulator input. This capacitor

should be in the range of 100 nF and should be placed right next to or under the IC, closest to the IC pins.

2. Make high-current ripple traces low-inductance (short, high W/L ratio).

3. Make high-current traces wide or copper islands.

4. Make high-current traces symetrical for dual–phase regulators (SW1, SW3).

MMPF0100Z Datasheet(PDF) 118 Page - NXP Semiconductors