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ICS307-03 Datasheet(PDF) 1 Page - Integrated Device Technology

Part # ICS307-03
Description  SERIALLY PROGRAMMABLE CLOCK SOURCE
PDF  14 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS307-03 Datasheet(HTML) 1 Page - Integrated Device Technology

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DATASHEET
SERIALLY PROGRAMMABLE CLOCK SOURCE
I CS3 0 7 -0 3
IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE
1
ICS307-03
REV L 032911
Description
The ICS307-03 is a dynamic, serially programmable clock
source which is flexible and takes up minimal board space.
Output frequencies are programmed via a 3-wire SPI port.
An advanced PLL coupled to an array of configurable
output dividers and three outputs allows low-jitter
generation of frequencies from 200 Hz to 270 MHz.
The device can be reprogrammed during operation, making
it ideal for applications where many different frequencies
are required, or where the output frequency must be
determined at run time. Glitch-free frequency transitions,
where the clock period changes slightly over many cycles,
are possible.
Features
• Crystal or clock reference input
• 3.3 V CMOS outputs
• Three outputs can be individually configured or shut off
• Small 16-pin TSSOP package – Pb-free, RoHS
compliant
• Reprogrammable during operation
• 3-wire SPI serial interface
• Glitch-free output frequency switching
• User selectable charge pump current and damping
resistor
• Power-down control via hardware pin or software control
bit
• Programming word can be generated by IDT VersaClock
II Software
• Directly programmable via VersaClock II Software and a
Windows PC parallel port
• Industrial temperature range available
Block Diagram
REF Divide
1-2055
VCO DIVIDE
12-2055
Resistor
(Table 4)
Charge Pump
(Table 3)
(Table 2)
(Table 5)
CLK1
[Bit 110]
[Bit 123]
[Bit 124]
[Bit 129]
[Bit 111]
CLK2
CLK3
(Table 7)
Divider
2 - 8232
(Table 1)
X1
X2
[Bit 122]
Divider
2 - 34
Divider
2 - 34
(Table 6)
1
0
1
0
11pF
300
pF
CP
Programming
Register
(132 bits)
DIN
CS
SCLK


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