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AD9558BCPZ Datasheet(PDF) 60 Page - Analog Devices

Part # AD9558BCPZ
Description  Quad Input Multiservice Line Card Adaptive Clock Translator with Frame Sync
PDF  105 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9558BCPZ Datasheet(HTML) 60 Page - Analog Devices

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AD9558
Data Sheet
Rev. C | Page 60 of 105
POWER SUPPLY PARTITIONS
The AD9558 power supplies are divided into four groups:
DVDD3, DVDD, AVDD3, and AVDD. All power and ground
pins must be connected, even if certain blocks of the chip are
powered down.
This section recommends the use of ferrite beads. Most users
report that the use of bypass capacitors together with ferrite
beads is the best arrangement, although some have reported
that ferrite beads alone are superior.
RECOMMENDED CONFIGURATION FOR 3.3 V
SWITCHING SUPPLY
A popular power supply arrangement is to power the AD9558
with the output of a 3.3 V switching power supply.
When the AD9558 is powered using 3.3 V switching power
supplies, all of the 3.3 V supplies can be connected to the 3.3 V
switcher output, and a 0.1 µF bypass capacitor must be placed
adjacent to each 3.3 V power supply pin.
Use of Ferrite Beads on 3.3 V Supplies
To ensure the best output to output isolation when using the
3.3 V CMOS output driver mode, use one ferrite bead each for
Pin 25 and Pin 26. However, a ferrite bead is not needed if 3.3 V
output driver mode is not used. However, the 3.3 V power supply
must still be connected to these pins even if the mode is not used.
CONFIGURATION FOR 1.8 V SUPPLY
When 1.8 V supplies are preferred, it is recommended that an
LDO regulator, such as the ADP222, be used to generate the
1.8 V supply from the 3.3 V supply.
The ADP222 offers excellent power supply rejection in a small
(2 mm × 2 mm) package. It has two 1.8 V outputs. One output
can be used for the DVDD pins (Pin 6, Pin 34, and Pin 35), and
the other output can drive the AVDD pins.
The ADP7104 is another good choice for converting 3.3 V to
1.8 V. The close-in noise of the ADP7104 is lower than that of
the ADP222; therefore, it may be better suited for applications
where close-in phase noise is critical and the AD9558 DPLL
loop bandwidth is <50 Hz. In such cases, all 1.8 V supplies can be
connected to one ADP7104.
Use of Ferrite Beads on 1.8 V Supplies
To ensure the best output-to-output isolation, use one ferrite
bead for each of the following AVDD pins: Pin 12, Pin 17,
Pin 22, Pin 29, and Pin 30. The ferrite beads must be placed in
between the 1.8 V LDO output and each pin listed previously.
Ferrite beads that have low (<0.7 Ω) dc resistance and
approximately 600 Ω impedance at 100 MHz are suitable for
this application.
Pin 6 and Pin 56 are 1.8 V digital supplies, and while they are
not susceptible to external noise, they are themselves a source of
digital noise. Therefore, a ferrite bead is recommended for each
of these pins. Pin 55 and Pin 56 can be joined together.
See Table 2 for the current consumed by each group. See
Figure 20, Figure 21, and Figure 22 for information on the
power consumption vs. output frequency.



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