AD5425 datasheet(13/20 Pages) AD

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REV. 0

AD5425

–13–

Voltage Switching Mode of Operation

Figure 7 shows this DAC operating in the voltage switching

mode. The reference voltage, VIN is applied to the IOUT1 pin,

IOUT2 is connected to AGND and the output voltage is available

at the VREF terminal. In this configuration, a positive reference

voltage results in a positive output voltage making single-supply

operation possible. The output from the DAC is voltage at a

constant impedance (the DAC ladder resistance), thus an op amp

is necessary to buffer the output voltage. The reference input no

longer sees a constant input impedance, but one that varies with

code. So, the voltage input should be driven from a low imped-

ance source.

VOUT

VDD

GND

VIN

IOUT2

IOUT1

RFB

VDD

VREF

NOTES

1. ADDITIONAL PINS OMITTED FOR CLARITY

2. C1 PHASE COMPENSATION (1pF– 2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 7. Single-Supply Voltage Switching Mode Operation

It is important to note that VIN is limited to low voltage because

the switches in the DAC ladder no longer have the same source-

drain drive voltage. As a result, their on resistance differs, which

degrades the linearity of the DAC.

Also, VIN must not go negative by more than 0.3 V or an inter-

nal diode will turn on, exceeding the max ratings of the device.

In this type of application, the full range of multiplying capabil-

ity of the DAC is lost.

POSITIVE OUTPUT VOLTAGE

Note that the output voltage polarity is opposite to the VREF

polarity for dc reference voltages. To achieve a positive voltage

output, an applied negative reference to the input of the DAC is

preferred over the output inversion through an inverting amplifier

because of the resistor tolerance errors. To generate a negative

reference, the reference can be level shifted by an op amp such

that the VOUT and GND pins of the reference become the virtual

ground and –2.5 V respectively, as shown in Figure 8.

VOUT =

0 TO +2.5V

VDD = 5V

GND

IOUT2

IOUT1

RFB

VDD

VREF

NOTES

1. ADDITIONAL PINS OMITTED FOR CLARITY

2. C1 PHASE COMPENSATION (1pF– 2pF) MAY BE

REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.

GND

VIN

VOUT

ADR03

+5V

–5V

1/2 AD8552

–2.5V

Figure 8. Positive Voltage Output with Minimum

of Components

ADDING GAIN

In applications where the output voltage is required to be greater

than VIN, gain can be added with an additional external amplifier

or it can also be achieved in a single stage. It is important to

take into consideration the effect of temperature coefficients of

the thin film resistors of the DAC. Simply placing a resistor in

series with the RFB resistor will causing mismatches in the

temperature coefficients resulting in larger gain temperature

coefficient errors. Instead, the circuit of Figure 9 is a recom-

mended method of increasing the gain of the circuit. R1, R2,

and R3 should all have similar temperature coefficients, but

they need not match the temperature coefficients of the DAC.

This approach is recommended in circuits where gains of

greater than 1 are required.

VOUT

VDD

GND

IOUT2

IOUT1

RFB

VDD

VREF

NOTES

1. ADDITIONAL PINS OMITTED FOR CLARITY

2. C1 PHASE COMPENSATION (1pF– 2pF) MAY BE

REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.

VIN

R1 = R2R3

R2 + R3

GAIN = R2 + R3

Figure 9. Increasing Gain of Current Output DAC

USED AS A DIVIDER OR PROGRAMMABLE GAIN

ELEMENT

Current steering DACs are very flexible and lend themselves to

many different applications. If this type of DAC is connected as the

feedback element of an op amp and RFB is used as the input resistor

as shown in Figure 10, then the output voltage is inversely pro-

portional to the digital input fraction D. For D = 1 – 2n the output

voltage is

V–V

/ D

–V/

–

OUT

–n

()

VOUT

VDD

GND

VIN

IOUT2

IOUT1

RFB VDD

VREF

NOTE

ADDITIONAL PINS OMITTED FOR CLARITY

Figure 10. Current Steering DAC Used as a Divider

or Programmable Gain Element

As D is reduced, the output voltage increases. For small values

of the digital fraction D, it is important to ensure that the ampli-

fier does not saturate and also that the required accuracy is met.

For example, an eight bit DAC driven with the binary code 0x/0

(00010000), i.e., 16 decimal, in the circuit of Figure 10 should

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