DS2282 datasheet(13/22 Pages) DALLAS

13 / 22 page

DS2282

022798 13/22

OOFCR: Out Of Frame Count Register (82). A

16–bit register that records Out Of Frame (OOF) error

events. An OOF error event occurs whenever 2 or more

framing bits out of 6 in the FPS are incorrect. An OOF

error event will cause the DS2282 to resynchronize to

the incoming data stream.

Receive PRM Operation

The DS2282 decodes the incoming FDL for scheduled

Performance Report Messages (PRM). It automatically

detects opening flags, deletes any stuffed zero bits that

may be present, and it calculates CRC–16 on all the

data between the opening and closing flags.

The

DS2282 normally only decodes the current second’s

data (octets 5 and 6). Data from the previous three se-

conds is “bumped” from PRMR0 to PRMR1 to PRMR2

to PRMR3 and finally out of available recall range. If the

PRM is received in error (CRC check sum is incorrect),

the message will be ignored. The DS2282 will keep

track of errored PRMs and properly place the unerrored

message when it is received. For example, if a PRM is

received that does not correspond to its CRC check

sum, then PRMR0 will be set to all zeros indicating that

an invalid message was received. If the next scheduled

message is received correctly, then the data missed in

the last scheduled message will be updated to PRMR1.

NOTE: PRMR0 to PRMR3 are only updated if PRMs

are received; if no valid or invalid PRMs are received,

then both the SE and FE bits in PRMR0 to PRMR3 will

be set to one.

PRMR0: PRM Register 0 (10)

PRMR1: PRM Register 1 (11)

PRMR2: PRM Register 2 (12)

PRMR3: PRM Register 3 (13)

PLB

CRC2

CRC1

CRC0

(LSB)

(MSB)

PLB

Payload Loopback Activated

Controlled Slip (slip

y 1)

Line Violation (BPV

y 1)

Severely Errored Framing Event (2 of 6

OOF

y 1)

Frame Sync Bit Error Event

CRC2

See Table Below

CRC1

See Table Below

CRC0

See Table Below

CRC2

CRC1

CRC0

EVENT

Invalid

CRC=0

CRC=1 (G1)

t CRC x 5 (G2)

t CRC x 10 (G3)

tCRCx100 (G4)

100

tCRCx319 (G5)

CRC

y 320 (G6)

PRM History Registers

There are three registers that keep track of the sched-

uled PRM and collect data on the receive performance

of the remote end. The first two of these registers

(PRMESR and PRMSESR) mock the monitor registers

in the type of data that they report. ES and SES are cal-

culated off of the received PRM data. The PRM data is

pulled from PRMR3 since it has the highest probability

of containing valid data. If PRMR3 does not contain val-

id data, then ES and SES are not calculated. The third

have been received in error.

PRMESR: PRM Errored Seconds Register

(1C). A 16–bit register that counts Errored Seconds

(ES). An ES is any one second time interval with either a

frame bit error (FE or SE=1) or CRC–6 error (G1 to

G6=1).

PRMSESR: PRM Severely Errored Seconds

Errored Seconds (SES). A SES is any one second time

interval with an OOF error event (SE=1) or more than

320 CRC–6 error events (G6=1).

PRMER: PRM Error Register (1E). An 8–bit reg-

ister that records the number of PRMs that have been

received in error. A PRM is considered to be received in

error when the calculated CRC does not match the in-

coming CRC word.

Transmit PRM Operation

The DS2282 will automatically generate PRMs once a

second to be included into the FDL for transmission to

the remote end. It automatically pulls together all the

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