S71PL129JC0 datasheet(123/149 Pages) SPANSION

123 / 149 page

June 25, 2004 pSRAM_Type02_15A1

Type 2 pSRAM

123

Advance

Informatio n

64M pSRAM

Notes:

1. Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measure after 60ms from

the time when standby mode is set up.

128M pSRAM

Notes:

1. Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measured after 60ms from

the time when standby mode is set up.

Item

Symbol

Test Conditions

Min Typ Max Unit

Average Operating

Current

ICC1

Cycle time=1µs, 100% duty, IIO=0mA,

CS1#

≤0.2V, LB#≤0.2V and/or UB#≤0.2V,

CS2≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V

—

— TBD mA

ICC2

Async

Cycle time=Min, IIO=0mA, 100% duty,

CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL,

VIN=VIH or VIL

—

— TBD mA

Page

Cycle time=tRC+3tPC, IIO=0mA, 100% duty,

CS1#=VIL, CS2=VIH LB#=VIL and/or UB#=VIL,

VIN-VIH or VIL

TBD mA

Standby Current (CMOS)

ISB1 (Note 1)

Other inputs=0-VCC

1. CS1# ≥ VCC - 0.2, CS2 ≥ VCC - 0.2V (CS1#

controlled) or

2. 0V ≤ CS2 ≤ 0.2V (CS2 controlled)

—

— TBD mA

Item

Symbol

Test Conditions

Min Typ Max Unit

Average Operating

Current

ICC1

Cycle time=1µs, 100% duty, IIO=0mA, CS1#≤0.2V,

LB#

≤0.2V and/or UB#≤0.2V, CS2≥VCC-0.2V, VIN≤0.2V or

VIN≥VCC-0.2V

—

— TBD mA

ICC2

Cycle time=tRC+3tPC, IIO=0mA, 100% duty, CS1#=VIL,

CS2=VIH LB#=VIL and/or UB#=VIL, VIN-VIH or VIL

—

— TBD mA

Standby Current (CMOS) ISB1 (Note 1)

Other inputs=0-VCC

1. CS1# ≥ VCC - 0.2, CS2 ≥ VCC - 0.2V (CS1# controlled) or

2. 0V ≤ CS2 ≤ 0.2V (CS2 controlled)

—

— TBD mA

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