AD9115BCPZ datasheet(14/52 Pages) AD

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AD9114/AD9115/AD9116/AD9117

Data Sheet

Rev. D | Page 14 of 52

PIN 1

INDICATOR

DB9

DB8

DB7

DB6

DVDDIO

DVSS

DVDD

DB5

DB4

DB3

23 QOUTP

24 RLQP

25 AVSS

26 AVDD

27 RLIP

28 IOUTP

29 IOUTN

30 RLIN

22 QOUTN

21 RLQN

TOP VIEW

(Not to Scale)

AD9116

NOTES

1. NC = NO CONNECT

2. THE EXPOSED PAD IS CONNECTED TO AVSS AND

MUST BE SOLDERED TO THE GROUND PLANE.

EXPOSED METAL AT PACKAGE CORNERS IS

CONNECTED TO THIS PAD.

Figure 4. AD9116 Pin Configuration

Table 9. AD9116 Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 4

DB[9:6]

Digital Inputs.

DVDDIO

Digital I/O Supply Voltage Input (1.8 V to 3.3 V Nominal).

DVSS

Digital Common.

DVDD

Digital Core Supply Voltage Output (1.8 V). Strap DVDD to DVDDIO at 1.8 V. If DVDDIO > 1.8 V, bypass DVDD

with a 1.0 µF capacitor; however, do not otherwise connect it. The LDO should not drive external loads.

8 to 12

DB[5:1]

Digital Inputs.

DB0 (LSB)

Digital Input (LSB).

14, 15

No Connect. These pins are not connected to the chip.

DCLKIO

Data Input/Output Clock. Clock used to qualify input data.

CVDD

Sampling Clock Supply Voltage Input (1.8 V to 3.3 V). CVDD must be ≥ DVDD.

CLKIN

LVCMOS Sampling Clock Input.

CVSS

Sampling Clock Supply Voltage Common.

CMLQ

Q DAC Output Common-Mode Level. When the internal on-chip (QRCML) is enabled, this pin is connected to

the on-chip QRCML resistor. It is recommended to leave this pin unconnected. When the internal on-chip (QRCML) is

disabled, this pin is the common-mode load for Q DAC and must be connected to AVSS through a resistor,

see the Using the Internal Termination Resistors section. Recommended value for this external resistor is 0 Ω.

RLQN

Load Resistor (62.5 Ω) to the CMLQ Pin. For the internal load resistor to be used, this pin should be tied to

QOUTN externally.

QOUTN

Complementary Q DAC Current Output. Full-scale current is sourced when all data bits are 0s.

QOUTP

Q DAC Current Output. Full-scale current is sourced when all data bits are 1s.

RLQP

Load Resistor (62.5 Ω) to the CMLQ Pin. For the internal load resistor to be used, this pin should be tied to

QOUTP externally.

AVSS

Analog Common.

AVDD

Analog Supply Voltage Input (1.8 V to 3.3 V).

RLIP

Load Resistor (62.5 Ω) to the CMLI Pin. For the internal load resistor to be used, this pin should be tied to

IOUTP externally.

IOUTP

I DAC Current Output. Full-scale current is sourced when all data bits are 1s.

IOUTN

Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s.

RLIN

Load Resistor (62.5 Ω) to the CMLI Pin. For the internal load resistor to be used, this pin should be tied to

IOUTN externally.

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