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Data Sheet

AD5686R/AD5685R/AD5684R

Rev. D | Page 23 of 31

25B

DAISY-CHAIN OPERATION

For systems that contain several DACs, the SDO pin can be

used to daisy-chain several devices together and is enabled

through a software executable daisy-chain enable (DCEN)

command. Command 1000 is reserved for this DCEN function

(see Table 8). The daisy-chain mode is enabled by setting

Bit DB0 in the DCEN register. The default setting is standalone

mode, where DB0 = 0. Table 10 shows how the state of the bit

corresponds to the mode of operation of the device.

Table 10. Daisy-Chain Enable (DCEN) Register

DB0

Description

Standalone mode (default)

DCEN mode

Figure 53. Daisy-Chaining the AD5686R/AD5685R/AD5684R

The SCLK pin is continuously applied to the input shift register

when

SYNCE

is low. If more than 24 clock pulses are applied, the

data ripples out of the input shift register and appears on the

SDO line. This data is clocked out on the rising edge of SCLK

and is valid on the falling edge. By connecting this line to the

SDIN input on the next DAC in the chain, a daisy-chain interface

is constructed. Each DAC in the system requires 24 clock pulses.

Therefore, the total number of clock cycles must equal 24 × N,

where N is the total number of devices that are updated.

SYNCE

is taken high at a clock that is not a multiple of 24, it is

considered a valid frame and invalid data may be loaded to the

DAC. When the serial transfer to all devices is complete,

SYNCE

is taken high. This latches the input data in each device in the

daisy chain and prevents any further data from being clocked

into the input shift register. The serial clock can be continuous or

a gated clock. A continuous SCLK source can be used only

SYNCE

can be held low for the correct number of clock cycles.

In gated clock mode, a burst clock containing the exact number

of clock cycles must be used, and

SYNCE

must be taken high after

the final clock to latch the data.

26B

READBACK OPERATION

Readback mode is invoked through a software executable

readback command. If the SDO output is disabled via the daisy-

chain mode disable bit in the control register, it is automatically

enabled for the duration of the read operation, after which it is

disabled again. Command 1001 is reserved for the readback

function. This command, in association with selecting one of

address bits, DAC A to DAC D, selects the register to read. Note

that only one DAC register can be selected during readback.

The remaining three address bits must be set to Logic 0. The

remaining data bits in the write sequence are don’t care bits. If

more than one or no bits are selected, DAC Channel A is read

back by default. During the next SPI write, the data appearing

on the SDO output contains the data from the previously

addressed register.

For example, to read back the DAC register for Channel A, the

following sequence should be implemented:

1. Write 0x900000 to the AD5686R/AD5685R/AD5684R

input register. This configures the part for read mode with

the DAC register of Channel A selected. Note that all data

bits, DB15 to DB0, are don’t care bits.

2. Follow this with a second write, a NOP condition,

0x000000 (0xF00000 in daisy-chain mode). During this

write, the data from the register is clocked out on the SDO

line. DB23 to DB20 contain undefined data, and the last 16

bits contain the DB19 to DB4 DAC register contents.

68HC11*

MISO

SDIN

SCLK

MOSI

SCK

PC7

PC6

SDO

SCLK

SDO

SCLK

SDO

SDIN

SYNC

LDAC

AD5686R/

AD5685R/

AD5684R

AD5686R/

AD5685R/

AD5684R

AD5686R/

AD5685R/

AD5684R

*ADDITIONAL PINS OMITTED FOR CLARITY.

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