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71321LA55PFG Datasheet(PDF) 13 Page - Integrated Device Technology |
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71321LA55PFG Datasheet(HTML) 13 Page - Integrated Device Technology |
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13 / 18 page ![]() 6.42 IDT71321SA/LA and IDT71421SA/LA High Speed 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges 13 T im ing Wa ve for m of BUSY Arbit ra t ion Cont rolle d by CE T im ing(1) T im ing Wa ve for m of BUSY Arbit ra t ion Cont rolle d by Addre ss M a t c h T im ing(1) NOTES: 1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”. 2. IftAPSisnotsatisfied,the BUSYwillbeassertedononesideortheother,butthereisnoguaranteeonwhichsideBUSY willbeasserted(IDT71321only). AC Ele c t ric a l Cha ra c t e rist ic s Ove r t he Ope ra t ing Te m pe ra t ure a nd Supply Volt a ge Ra nge (1) NOTE: 1. 'X' in part numbers indicates power rating (SA or LA). tAPS (2) ADDR "A" AND "B" ADDRESSES MATCH tBAC tBDC CE"B" CE"A" BUSY"A" 2691 drw 12 BUSY"B" ADDRESSES DO NOT MATCH ADDRESSES MATCH tAPS (2) ADDR"A" ADDR"B" 2691 drw 13 tBAA tBDA tRC or tWC 71321X20 71421X20 Com'l Only 71321X25 71421X25 Com'l & Ind Symbol Parameter Min.Max.Min.Max. Unit INTERRUPT TIMING tAS Address Set-up Time 0 ____ 0 ____ ns tWR Write Recovery Time 0 ____ 0 ____ ns tINS Interrupt Set Time ____ 20 ____ 25 ns tINR Interrupt Reset Time ____ 20 ____ 25 ns 2691 tbl 11a |
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