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AX88875AP Datasheet(PDF) 19 Page - ASIX Electronics Corporation |
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AX88875AP Datasheet(HTML) 19 Page - ASIX Electronics Corporation |
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19 / 23 page ![]() AX88875AP Bripeater ASIX ELECTRONICS CORPORATION 19 Symbol Description Min Typ. Max Units T4 RX_CLK Clock Cycle Time 39.996 40 40.004 ns T5 RX_CLK Clock High Time 14 20 26 ns T6 CRS to RXE Assertion Delay 20 ns T7 CRS to RXE De-assertion Delay 160 200 ns T8 CRS to RXDV Delay Requirement 40 160 ns T9 RXD or RXDV or RX_ER setup to RX_CLK rise time 10 - ns 5.4.2 SRAM read cycle and write cycle BMA[16:0] /BMWR BMD[7:0] Symbol Description Min Max Units T1 Read Cycle Time 40 - ns T2 BMD[7:0] Setup Time 3 - ns T3 BMD[7:0] Hold Time 3 - ns BMA[16:0] /BMWR BMD[7:0] Symbol Description Min Max Units T4 Write Cycle Time 38 - ns T5 Write Pulse Wtdth 20 - ns T6 BMD[7:0] Data Valid to End of Write 14 - ns T7 BMD[7:0] Data Hold from End of Write 1 ns T1 T3 T2 T4 T7 T5 T6 |
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