ZL38002 datasheet(22/47 Pages) ZARLINK

22 / 47 page

ZL38002

Data Sheet

Zarlink Semiconductor Inc.

6.0

Bit

Name

Description

LIMIT

When high, Rin and Sin signals are limited to 0.25 in amplitude.

When low, no limit is imposed on the inputs.

MUTE_R

When high, the Rin path is muted to quiet code (after the NLP) and when low

the Rin path is not muted.

MUTE_S

When high, the Sin path is muted to quiet code (after the NLP) and when low

the Sin path is not muted.

BYPASS

When high, the Send and Receive paths are transparently by-passed from

input to output and when low the Send and Receive paths are not bypassed.

NB-

When high, Narrowband signal detectors in Rin and Sin paths are disabled

and when low the signal detectors are enabled.

AGC-

When high, AGC is disabled and when low AGC is enabled.

AH-

When high, the Howling detector is disabled and when low the Howling

detector is enabled.

RESET

When high, the power initialization routine is executed presetting all registers

to default values.

This bit automatically clears itself to’0’ when reset is complete.

Bit

Name

Description

SHFT

When high and in 16-bit linear mode, this bit enables shift right by 2 on inputs

Sin, Rin, and shift left by 2 on outputs Sout, Rout, for codec. If not in 16-bit

linear mode for both I/O ports, this bit is ignored.

When low, =default, no shift.

Reserved

Reserved: Must be set to low

Reserved

Reserved: Must be set to low

Read/Write Page 0, Address: 00H

Reset Value: 00H

765

43210

LIMIT

MUTE_R

MUTE_S

BYPASS

NB-

AGC-

AH-

RESET

Read/Write Address: 01H

Reset Value: 00H

765

43210

SHFT

Reserved

NRdis

NSUP3

NSUP2

NSUP1

NSUP0

ZL38002 Datasheet(PDF) 22 Page - Zarlink Semiconductor Inc

ZL38002 Datasheet(HTML) 22 Page - Zarlink Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL