AD840

REV. C

–8–

HIGH SPEED DAC BUFFER CIRCUIT

The AD840’s 100 ns settling time to 0.01% for a 10 V step

makes it well suited as an output buffer for high speed D/A con-

verters. Figure 25 shows the connections for producing a 0 to

+10.24 V output swing from the AD568 35 ns DAC. With the

AD568 in unbuffered voltage output mode, the AD840 is

placed in noninverting configuration. As a result of the 1 k

Ω

span resistor provided internally in the AD568, the noise gain of

this topology is 10. Only 5 pF is required across the feedback

(span) resistor to optimize settling.

Figure 25. 0 V to +10.24 V DAC Output Buffer

OVERDRIVE RECOVERY

Figure 26 shows the overdrive recovery capability of the AD840.

Typical recovery time is 190 ns from negative overdrive and

350 ns from positive overdrive.

Figure 26. Overdrive Recovery

Figure 27. Overdrive Recovery Test Circuit

14-Pin Plastic (N) Package

20-Pin LCC (E) Package

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

14-Pin Cerdip (Q) Package