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CAT5261 Datasheet(PDF) 1 Page - Catalyst Semiconductor |
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CAT5261 Datasheet(HTML) 1 Page - Catalyst Semiconductor |
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1 / 15 page ![]() 1 DESCRIPTION The CAT5261 is two Digitally Programmable Potentiometers (DPPs™) integrated with control logic and 8 bytes of NVRAM memory. Each DPP consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 8-bit control register (WCR) independently controls the wiper tap switches for each DPP. Associated with each wiper control register are four 8-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data CAT5261 Dual Digitally Programmable Potentiometer (DPP™) with 256 Taps and SPI Interface FEATURES s Two linear-taper digitally programmable potentiometers s 256 resistor taps per potentiometer s End to end resistance 50k Ω or 100kΩ s Potentiometer control and memory access via SPI interface s Low wiper resistance, typically 100 Ω Ω Ω Ω Ω s Nonvolatile memory storage for up to four wiper settings for each potentiometer s Automatic recall of saved wiper settings at power up s 2.5 to 6.0 volt operation s Standby current less than 1 µA s 1,000,000 nonvolatile WRITE cycles s 100 year nonvolatile memory data retention s 24-lead SOIC and 24-lead TSSOP s Industrial temperature range PIN CONFIGURATION FUNCTIONAL DIAGRAM © 2004 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Document No. 2122, Rev. B registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the potentiometers is automatically loaded into its respective wiper control register. The CAT5261 can be used as a potentiometer or as a two terminal, variable resistor. It is intended for circuit level or system level adjustments in a wide variety of applications. It is available in the -40 °C to 85°C industrial operating temperature range and offered in a 24-lead SOIC and TSSOP package. ALO GEN FR TM LEAD FREE 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 CAT 5261 SO A0 NC NC NC NC VCC RL0 RH0 RW0 CS WP HOLD SCK NC NC NC NC GND RW1 RH1 RL1 A1 SI SOIC/TSSOP Package (J, W/U, Y) R H0 W0 W1 H1 R RL0 L1 R WIPER CONTROL REGISTERS NONVOLATILE DATA REGISTERS SPI BUS INTERFACE CONTROL LOGIC A0 A1 R R WP CS SCK SI SO HOLD |
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