ADP3418 datasheet(3/16 Pages) AD

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ADP3418

Rev. B | Page 3 of 16

SPECIFICATIONS1

VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.

Table 1.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

SUPPLY

Supply Voltage Range

VCC

4.15

13.2

Supply Current

ISYS

BST = 12 V, IN = 0 V

OD INPUT

Input Voltage High

2.6

Input Voltage Low

0.8

Input Current

–1

µA

Propagation Delay Time

tpdhOD

See Figure 3

tpdlOD

See Figure 3

PWM INPUT

Input Voltage High

3.0

Input Voltage Low

0.8

Input Current

–1

µA

HIGH-SIDE DRIVER

Output Resistance, Sourcing Current

VBST − VSW = 12 V

1.8

3.0

Ω

Output Resistance, Sinking Current

VBST − VSW = 12 V

1.0

2.5

Ω

Transition Times

trDRVH

See Figure 4, VBST − VSW = 12 V,

CLOAD = 3 nF

tfDRVH

See Figure 4, VBST − VSW = 12 V,

CLOAD = 3 nF

Propagation Delay2

tpdhDRVH

See Figure 4, VBST − VSW = 12 V

tpdlDRVH

VBST − VSW = 12 V

LOW-SIDE DRIVER

Output Resistance, Sourcing Current

1.8

3.0

Ω

Output Resistance, Sinking Current

1.0

2.5

Ω

Transition Times

trDRVL

See Figure 4, CLOAD = 3 nF

tfDRVL

See Figure 4, CLOAD = 3 nF

Propagation Delay

tpdhDRVL

See Figure 4

tpdlDRVL

See Figure 4

Timeout Delay

SW = 5 V

240

SW = PGND

120

1 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).

2 For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.

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