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SOLOMON
SSD1815B
Rev 1.6
07/2002
Table 13 8080-Series MPU Parallel Interface Timing Characteristics (VDD - VSS = 2.4 to 3.5V, TA = -30 to 85°C)
Symbol
Parameter
Min
Typ
Max
Unit
tcycle
Clock Cycle Time
300
-
-
ns
tAS
Address Setup Time
0
-
-
ns
tAH
Address Hold Time
0
-
-
ns
tDSW
Write Data Setup Time
40
-
-
ns
tDHW
Write Data Hold Time
15
-
-
ns
tDHR
Read Data Hold Time
20
-
-
ns
tOH
Output Disable Time
-
-
70
ns
tACC
Access Time
-
-
140
ns
PWCSL
Chip Select Low Pulse Width (read)
Chip Select Low Pulse Width (write)
120
60
-
-
-
-
ns
ns
PW CSH
Chip Select High Pulse Width (read)
Chip Select High Pulse Width (write)
60
60
-
-
-
-
ns
ns
tR
Rise Time
-
-
15
ns
tF
Fall Time
-
-
15
ns
Figure 12 8080-series MPU Parallel Interface Characteristics
Valid Data
tcycle
tDSW
tAS
tAH
tDHR
tACC
WR
D0-D7
Valid Data
D0-D7
(Write data to driver)
(Read data from driver)
tDHW
PWCSL
PWCSH
tF
tR
(CS2=1)
tOH
D/C
CS1
RD
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