PTH08000WAS2 datasheet(3/20 Pages) TI

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ELECTRICAL CHARACTERISTICS

PTH08000W

SLTS248 – JUNE 2005

at 25°C free-air temperature, V

I = 12 V, VO = 3.3 V, IO = IOmax, CI = 100 µF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output current

TA = 85°C, natural convection airflow

2.25

Input voltage range

Over IO range

4.5 (1)

Set-point voltage tolerance

TA = 25°C

±2 (2)

Temperature variation

-40

≤ T

A ≤ 85°C

±0.5

%VO

Line regulation

Over VI range

±7

Load regulation

Over IO range

±0.13

%VO

Total output voltage variation

Includes set-point, line, load, -40

°C ≤ T

A ≤ 85°C

3 (2)

%VO

V(ADJ)

Output Voltage Adjust Range

Over IO range

0.9

5.5

RSET = 346 Ω, VO = 5 V

93.5%

RSET = 1.87 kΩ, VO = 3.3 V

92%

RSET = 3.74 kΩ, VO = 2.5 V

90.5%

TA = 25°C,

Efficiency

RSET = 6.19 kΩ, VO = 2 V

89.5%

IO = 2 A

RSET = 8.06 kΩ, VO = 1.8 V

88%

RSET = 13 kΩ, VO = 1.5 V

86.5%

RSET = 27.4 kΩ, VO = 1.2 V

84.5%

Output voltage ripple

20-MHz bandwidth

mVPP

Overcurrent threshold

Reset, followed by autorecovery

3.5

CO = 100 µF, 1

Recovery time

µs

A/µs load step

Transient response

from 50% to

VO over/undershoot

100

100% IOmax

IIL track

Track input current (pin 2)

Pin to GND

–130

µA

dVtrack/dt

Track slew rate capability

CO ≤ CO(max)

V/ms

VI = increasing

4.35

4.5

UVLO

Undervoltage lockout

VI = decreasing

3.6

Input high voltage (VIH)

VI – 0.5

Open (3)

Inhibit control (pin 5)

Input low voltage (VIL)

–0.2

0.5

Input low current (IIL)

–5

µA

II (stby)

Input standby current

Pins 5 and 2 connected

Switching frequency

Over VI and IO ranges

300

kHz

External input capacitance

Electrolytic type (CI)

100 (4)

µF

Ceramic type (CO)

220

µF

External output capacitance

Nonceramic type (CO)

100 (5)

330 (6)

Equivalent series resistance (nonceramic)

10 (7)

Ω

Per Telcordia SR-332, 50% stress,

MTBF

Calculated reliability

10.3

106 Hr

TA = 40°C, ground benign

(1)

The minimum input voltage is 4.5 V or (VO + 1.1) V, whichever is greater.

(2)

The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a

tolerance of 1% with 100 ppm/°C or better temperature stability.

(3)

This control pin has an internal pullup to the input voltage VI. If it is left open-circuit, the module operates when input power is applied. A

small, low-leakage (< 100 nA) metal-oxide semiconductor field effect transistor (MOSFET) is recommended for control. See the

Application Information for further guidance.

(4)

An external 100-µF electrolytic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to

the module.

(5)

An external output capacitor is not required for proper operation. Adding 100 µF of distributed capacitance at the load improves the

transient response.

(6)

This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application

information for further guidance.

(7)

This is the minimum ESR for all the electrolytic (nonceramic) capacitance. Use 14 m

Ω as the minimum when calculating the total

equivalent series resistance (ESR) using the maximum ESR values specified by the capacitor manufacturer.

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