LD7591GS datasheet(11/20 Pages) LEADTREND

11 / 20 page

LD7591

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7591-DS-00 March 2010

Where Ra and Rb are top and bottom feedback resistor

values (as shown in the Fig. 14).

Fig. 14

OVP and Disable on INV pin

To prevent the over voltage on the output capacitor from

the fault condition, LD7591 is implemented with an OVP

function on INV pin. Whenever the INV voltage is higher

than the OVP threshold voltage 2.675V, the output gate

drive circuit will be shutdown simultaneously thus to stop

the switching of the power MOSFET until the INV pin

down to 2.5V. The OVP function in LD7591 is an

auto-recovery type protection. The Fig. 15 shows its

operation. On the other hand, if the OVP condition is

removed, the Vcc level will get back to normal level and

the output will automatically return to the normal

operation.

The disable comparator disables the operation of the

LD7591 when the voltage of the inverting input is lower

than 0.35V and there is 100mV hysteresis. An external

small signal MOSFET can be used to disable the IC,

referring to Fig. 14. The IC operating current decreases

below 65μA to reduce power consumption if the IC is

disabled.

Fig. 15

Zero Current Detection (ZCD)

Fig. 16 shows typical ZCD-block. The Zero Current

Detection block will switch on the external MOSFET as

the current through the boost inductor drops to zero in

using an auxiliary winding coupled with the inductor. This

feature allows transition-mode operation. If the voltage of

the ZCD pin goes higher than 0.2V, the ZCD comparator

waits until the voltage rises above 0.1V. If the voltage

goes below 0.1V, the zero current detector will turn on the

MOSFET. The ZCD pin is protected internally by two

clamps, 6.0V-high clamp and -0.7V-low clamp. The

150

μs timer generates a MOSFET turn on signal if the

driver output has been low for more than 150

μs from the

falling edge of the driver output.

Fig. 16

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