LD7591GS datasheet(12/20 Pages) LEADTREND

12 / 20 page

LD7591

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7591-DS-00 March 2010

Fig. 17 shows typical ZCD-related waveforms. Rz1 will

produce some delay because of the capacitance carried

by ZCD pin, it therefore delay the turn-on time accordingly.

The switch will be turned on when the inductor current

reaches zero; because of the structure of the ZCD delay,

it will be turned on after some delay time. During this

delay time, the stored charge of the COSS (MOSFET

output capacitor) will be discharged through the path

indicated in Fig. 18. This charge is transferred into a small

filter capacitor CIN1, which is connected to the bridge

diode. Therefore, there is no current flowing from the

input side. That is, the input current IIN is zero during this

period. In order to reduce the negative current flowing to

the internal diode, a larger resistance of RZ1 over 47kΩ is

recommended.

Fig. 17

Fig. 18

Ramp Generator Block

The output of the gm error amplifier and the output of the

ramp generator block are compared to determine the

MOSFET on time, as shown in Fig. 19. The slope of the

ramp is determined by an external resistor connected to

the RAMP pin. The voltage of the RAMP pin is 2.9V and

the slope is proportional to the current flowing out of the

RAMP pin. The internal ramp signal has a 1V offset;

therefore, the drive output will be shut down if the voltage

of the COMP pin is lower than 0.95V. The programmed

on-time will be at its maximum when the COMP pin is

open. The COMP pin open voltage is about 5.4~6.6V.

According to the slope of the internal ramp, the maximum

on-time can be programmed. The necessary maximum

on-time will be achieved depending on the boost inductor,

lowest AC line voltage, and maximum output power. The

resistor value should be designed properly. The

maximum on-time can be obtained from below

RAMP

)

MAX

(

Time

⋅

−

Fig. 19

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