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MSM6927 Datasheet(PDF) 6 Page - OKI electronic componets |
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MSM6927 Datasheet(HTML) 6 Page - OKI electronic componets |
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6 / 31 page ![]() ¡ Semiconductor MSM6927/6947 6/31 Control LT 444I Digital loop back test. During digital "High", any data sent on the XD pin will appear on the RD pin, and any data sent on the RS1 pin will immediately appear on the CS pin. Any data demodulated from the received carrier on the AIN pin will be the modulated data to implement the transmitted carrier. In this case, sending the transmitted carrier to the phone line depends on the CC, but never on RS1. During digital loop back test, the data on this pin becomes a control signal for sending the transmitted carrier to the phone line in place of RS1. CC 52I When an external circuit gives the RS/CS delay time which is not within the device as required, this pin should be connected to the external circuit output. See Fig. 11-1 or Fig. 11-2 for MSM6927, MSM6947 respectively. RS2 88I The fast carrier detection output. This pin is internally connected to the input of the built-in carrier detect delay circuit. When an external delay circuit provides the delay time which is not within the device as required, the CD1 should be connected to the external circuit input. See Fig. 11-1 or Fig. 11-2 for MSM6927, MSM6947 respectively. CD1 11 12 O Name Pin No. RS GS-K I/O Description CD2 12 13 I/O When an external circuit gives the carrier detect delay time which is not within the device as required, this pin becomes the input pin for the external circuit output signal. In other cases (when using the delay time within the device, the data on the TS1 (TS) or TS2 is not digital "High"), this pin becomes the Carrier detect signal output. The RD1 data is demodulated data from the received carrier and the RD2 is the input of the following logic circuits referred to in Fig. 12-1and Fig. 12-2. for MSM6927 and MSM6947, respectively Usually, the RD1 data is input directly to RD2. In some cases, as input data to RD2, the data that is controlled by NCU (Network control unit) etc. may be required in stead of the RD1 data. RD1 13 14 O RD2 14 16 I These two pins are the output (CRD1) and inverting input (CDR2) of the buffer operational amplifier of which the noninverting input is connected to the built-in voltage reference, stabilized to variations in the supply voltage and temperature. See Fig. 13. An adequate carrier-detect level can be set by selecting the ratio of R8 to R9. Therefore, the loss in the received carrier level by phone-line transformer can be compensated by adjusting the ratio of R8 to R9. R8 + R9 should be greater than 50 k W. CDR1 16 20 O CDR2 17 21 I When the data rate is 1200 bps and in half duplex mode on two-wire facilities, the delay function called as receiver-squelch is required. In case of four wire facilities, this function is not usually required. When a digital "High" is input to the SQ pin, this function is omitted. SQ 22 31 I This pin may be used for device tests only. During digital "High", the AO pin will be connected to receiving filter output instead of transmitting filter output. FT 23 32 I |
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