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PCA9548APW Datasheet(PDF) 7 Page - NXP Semiconductors

Part # PCA9548APW
Description  8-channel I2C switch with reset
PDF  25 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCA9548APW Datasheet(HTML) 7 Page - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 15 April 2005
7 of 25
Philips Semiconductors
PCA9548A
8-channel I2C switch with reset
7.2.1 Control register definition
One or several SCx/SDx downstream pair, or channel, is selected by the contents of the
control register. This register is written after the PCA9548A has been addressed. The
2 LSBs of the control byte are used to determine which channel is to be selected. When a
channel is selected, the channel will become active after a STOP condition has been
placed on the I2C-bus. This ensures that all SCx/SDx lines will be in a HIGH state when
the channel is made active, so that no false conditions are generated at the time of
connection.
Remark: Multiple channels can be enabled at the same time. Example: B7 = 0, B6 = 1,
B5 = 0, B4 = 0, B3 = 1, B2 = 1, B1 = 0, B0 = 0, means that channels 7, 5, 4, 1 and 0 are
disabled and channels 6, 3, and 2 are enabled. Care should be taken not to exceed the
maximum bus capacitance. Default condition is all zeroes.
7.3 RESET input
The RESET input is an active LOW signal which may be used to recover from a bus fault
condition. By asserting this signal LOW for a minimum of tWL, the PCA9548A will reset its
register and I2C-bus state machine and will deselect all channels. The RESET input must
be connected to VDD through a pull-up resistor.
7.4 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9548A in
a reset condition until VDD has reached VPOR. At this point, the reset condition is released
and the PCA9548A register and I2C-bus state machine are initialized to their default
states—all zeroes—causing all the channels to be deselected. Thereafter, VDD must be
lowered below 0.2 V to reset the device.
Table 4:
Control register: Write—channel selection; Read—channel status
B7
B6
B5
B4
B3
B2
B1
B0
Command
XXXXXXX
0
channel 0 disabled
1
channel 0 enabled
XXXXXX
0
X
channel 1 disabled
1
channel 1 enabled
XXXXX
0
XX
channel 2 disabled
1
channel 2 enabled
XXXX
0
XXX
channel 3 disabled
1
channel 3 enabled
XXX
0
XXXX
channel 4 disabled
1
channel 4 enabled
XX
0
XXXXX
channel 5 disabled
1
channel 5 enabled
X
0
XXXXXX
channel 6 disabled
1
channel 6 enabled
0
XXXXXXX
channel 7 disabled
1
channel 7 enabled



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