15/20

¡ Semiconductor

MSM80C48/49/50, MSM80C35/39/40

output data changes from "0" to "1", thus speeding up the rise time of the output signals.

When these ports are used as input ports, the internal pull-up resistor becomes approximately

9 kW when input data is "1".

The internal pull-up resistor rises to approximately 100 kW when input data is "0".

Thus, a high noise margin can be obtained by selecting the impedance and thus the outflow

of current is minimized whenever these ports are used as output or input ports.

3.3 Clock generation control via the SS pin

When the crystal oscillator is halted in the HLTS or hardware power-down mode, the SS

pin is pulled down by a resistor of 20 to 50 kW, while its internal pull-up resistor of 200 to

of the SS pin is changed from pull-down to pull-up. Consequently, the CPU can be halted

for any period of time until the crystal oscillator resumes normal oscillation when a

capacitor is connected to the SS pin.

4.

Power-Down Mode

The MSM80C48, MSM80C49, and MSM80C50 power-down mode can be enabled in two

different ways through software by a combination of clock control and port floating

4.1 Software power-down mode

Power-down mode can be done by a combination of the following instructions.

(1) HALT (clock supply halt to control circuit)

Instruction code :

Description :

Although crystal oscillator operation is continued, the clock supply to

the CPU control circuit is halted and CPU operations are suspended.

When cancelling this software mode, restart is accomplished without

oscillator wait.

(2) HLTS (oscillation stop)

Instruction code :

Description :

The oscillator operation is halted and CPU operations are suspended. In

cancelling this power down mode, connecting a capacitor to the SS pin

enables a reasonable wait period to be accomplished before normal

operation is resumed. [Except in the case of using the RESET pin]

Instruction code :

Description :

00000001

10000010

10100010

P1

P2

BP

Internal ROM mode

Floating

Floating

Floating

External ROM mode

Floating

Operation