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FP6801 Datasheet(PDF) 1 Page - Fitipower Integrated Technology Inc. |
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FP6801 Datasheet(HTML) 1 Page - Fitipower Integrated Technology Inc. |
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1 / 9 page ![]() 1 FP6801-1.7-DEC-2012 FP6801 85T fitipower integrated technology lnc. Microprocessor Reset Circuits With Adjustable Delay Time Pin Assignments S5 Package (SOT-23-5) 2 1 3 4 5 OUT VDD CD NC GND C8 Package (SC-82) 1 2 4 3 GND OUT VDD CD Figure 1. Pin Assignment of FP6801 Ordering Information Description The FP6801 asserts a reset signal whenever the VDD supply voltage declines below a preset threshold. The reset threshold voltage is fixed internally with an accuracy of ±2.0%. A time delayed reset can be accomplished with the addition of an external capacitor. The output reset signal is set to be active low. That means when the power supply voltage is lower than reset threshold, the OUT pin will turn low. FP6801 has two different output forms, CMOS output and N-channel open-drain output. It is available in space-saving SOT-23-5 and SC-82 packages. Features Precision Monitoring of 2.5V, 3.0V, 3.3V and 5.0V Power Supply Voltages Ultra-Low Supply Current at 2.5µA Typ. Operating Voltage Range from 1V to 5.5V ±2.0% Reset Threshold Accuracy Reset Threshold Hysteresis: 5% Typ. Active Low Output Adjustable Delay Time Small Package: SOT-23-5 and SC-82 RoHS Compliant Applications TFT-LCD Panel Battery Powered Equipment Microprocessor Power Supply Monitoring Embedded System Automotive TR: Tape/Reel P: Green G: Green FP6801- □□□□□ Package Type S5: SOT-23-5 C8: SC-82 Reset Voltage 21: 2.1V 25: 2.5V 29: 2.9V 22: 2.2V 26: 2.6V 31: 3.1V 24: 2.4V 27: 2.7V Output Type C: Push-Pull N: Open-Drain |
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