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GPCE040A Datasheet(PDF) 6 Page - Generalplus Technology Inc. |
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GPCE040A Datasheet(HTML) 6 Page - Generalplus Technology Inc. |
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6 / 26 page ![]() GPCE040A © Generalplus Technology Inc. Proprietary & Confidential 6 Oct 01, 2013 Version: 1.4 5.1. PAD Assignment ( 0 , 0 ) 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 1 2 3 5 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 22 23 24 25 26 27 28 29 30 31 32 33 34 X32O X32I TEST VDD N/C VSS N/C VSS N/C DAC1 DAC2 V2VREF AVSS AGC OPI MICOUT MICN N/C 35 36 37 38 39 IOA10 IOA9 IOA12 IOA11 IOA14 IOA13 N/C IOA15 SLEEP VSSIO IOB14 IOB15 IOB12 IOB13 IOB11 4 6 55 N/C W DGOPT This IC substrate should be connected to VSS Note1: To ensure the IC functions properly, please bond all of VDD and VSS pins. Note2: The 0.1 μF capacitor between VDD and VSS should be placed to IC as closed as possible |
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