GPF8F datasheet(9/24 Pages) GENERALPLUS

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GPF8F Series

Proprietary & Confidential

Aug. 03, 2018

Version: 1.1

7 FUNCTION DESCRIPTIONS

7.1 CPU

GPF8F is equipped with a 16-bit

’nS2.0P™ (pronounced as

micro-n-SP) CPU.

Sixteen registers are featured in

’nSP™ 2.0:

R1 - R4 and R8 ~ R15 (General-purpose registers), PC (Program

Counter), SP (Stack Pointer), Base Pointer (BP) , SR (Segment

The interrupts include

30 FIQs (Fast Interrupt Request) and IRQs (Interrupt Request),

plus one software-interrupt, BREAK.

7.2 Memory

7.2.1 SRAM

There is 6K-word working SRAM and 2K-word dedicated cache

RAM, working SRAM ranged from $0000 through $17FF.

7.2.2 Embedded Flash

GPF8F features a high-speed embedded FLASH with access

speed of three CPU clock cycles.

7.3 PLL, Clock, Power Mode

7.3.1 PLL (Phase Lock Loop)

The purpose of PLL is to pump the frequency from 12MHz to

72MHz for system clock (FOSC).

The default PLL frequency is

12MHz.

7.3.1.1

System clock

System clock is derived by PLL and programmed by register to

supply operating clock for system.

7.3.1.2

32768Hz RTC

The Real Time Clock (RTC) is normally used in watch, clock or

other time related products.

A 2Hz-RTC (0.5 seconds) function

is loaded in GPF8F.

The RTC counts the time as well as to

wake CPU up whenever RTC occurs.

Since the RTC is

generated each 0.5 seconds, time can be traced by the number

of RTC occurrences.

In addition, GPF8F supports 32768Hz

crystal oscillator in normal mode and auto-power-saving mode.

In normal mode, 32768Hz OSC always runs at the highest power

consumption.

7.4 Standby Mode

The GPF8F features a power savings mode (or called standby

mode) for low power applications.

In such mode, SRAM and

I/Os remain in the previous states until CPU being awakened.

After GPF8F is awakened, CPU will continue to execute the

program from where it slept.

7.5 Low Voltage Detection and Low Voltage Reset

7.5.1

Low voltage detection (LVD)

The Low Voltage Detection (LVD) reports the circumstance of

present voltage.

There are seven LVD levels to be selected:

2.4V, 2.6V, 2.8V, 3.0V, 3.2V, 3.4V and 3.6V.

7.5.2

Low voltage reset

In addition to the LVD, the GPF8F has another important function,

Low Voltage Reset (LVR).

With the LVR function, a reset signal

is generated to reset system when the operating voltage drops

below LVR level.

7.6 Interrupt

The GPF8F has 30 interrupt sources, grouped into two types,

FIQ (Fast Interrupt Request) and IRQ (Interrupt request).

The

priority of FIQ is higher than IRQ.

User can refer programming

guide for details.

7.7 I/O

The GPF8F has 32-bit programmable I/Os featuring wakeup

capability.

The following

diagram

an I/O schematic.

Data

Control

Logic

I/O Pad

P_IOA/B_Buffer(R)

P_IOA/B_Buffer(W)

P_IOA/B_Dir(R/W)

P_IOA/B_Attrib(R/W)

P_IOA/B_Data(R)

In addition to a general purpose I/O port function, IOA/B also

shares/carries some special functions.

A summary of IOA/B

special functions is listed as follows:

GPF8F Datasheet(PDF) 9 Page - Generalplus Technology Inc.

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