5635AS–USB–12/04

Features

Execution

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

Clocks:

– Internal Clock for Standard UART Rates

– A 48 MHz and 96 MHz Clock for USB Data Recovery

– AVR Processor and System Clock

– Full-speed USB Interface (12 Mbits per Second) 2.0 Compliant

– Both UARTs Incorporate individual Transmit and Receive FIFOs of 16 Bytes

– UART0 Supports Modem Control Signals

– Programmable SPI Interface

– Device Firmware Upgrade Through USB for the internal Program SRAM (No

External Non-volatile SPI Memory Required)

– Device Firmware Upgrade Through USB for both the Internal Program SRAM and

– SPI Program Mode from the External DataFlash or EEPROM

External SRAM (DMA Transfer Rate is 12 MHz for All Channels)

Memory)

for Program Storage in the Address Area Above the Program Memory)

– 1.8V for the Core

– 1.8V or 3.3V for the Periphery

–3.3V for the USB

High-speed

(48 MHz)

Bridging Device

AT76C712

Summary