SC4525FEVB datasheet(15/23 Pages) SEMTECH

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SC4525F

Applications Information (Cont.)

The block diagram in Figure 8 shows the control loops of a

buck converter with the SC4525F. The inner loop (current

loop) consists of a current sensing resistor (R

s=3.53mW)

and a current amplifier (CA) with gain (G

CA=8.5). The

outer loop (voltage loop) consists of an error amplifier

(EA), a PWM modulator, and a LC filter.

Since the current loop is internally closed, the remaining

task for the loop compensation is to design the voltage

compensator (C

5, R7, and C8).

Resr

COM P

REF

CONTROLLER AND SCHOTTKY DIODE

PW M

M ODULATOR

Vram p

Figure 8 — Block diagram of control loops

For a converter with switching frequency F

SW, output

inductance L

, output capacitance CO and loading R, the

control (V

C) to output (VO) transfer function in Figure 8 is

given by:

)

/ω

s/ω

)

s/ω

)

ESR

PWM

This transfer function has a finite DC gain

PWM

≈

an ESR zero F

Z at

ESR

ω =

It has a dominant low-frequency pole F

P at

ω ≈

and double poles at half the switching frequency.

Including the voltage divider (R

4 and R6), the control to

feedback transfer function is found and plotted in Figure

9 as the converter gain.

Since the converter gain has only one dominant pole at

low frequency, a simple Type-2 compensation network

is sufficient for voltage loop compensation. As shown in

Figure 9, the voltage compensator has a low frequency

integrator pole, a zero at F

Z, and a high frequency pole

at F

P. The integrator is used to boost the gain at low

frequency. The zero is introduced to compensate the

excessive phase lag at the loop gain crossover due to the

integrator pole (-90deg) and the dominant pole (-90deg).

The high frequency pole nulls the ESR zero and attenuates

high frequency noise.

Figure 9 — Bode plots for voltage loop design

Therefore, the procedure of the voltage loop design for

the SC4525F can be summarized as:

Plot the converter gain, i.e. control to feedback transfer

function.

Select the open loop crossover frequency, F

between 0% and 20% of the switching frequency. At

C, find the required compensator gain, AC. In typical

applications with ceramic output capacitors, the ESR

zero is neglected and the required compensator gain

at F

C can be estimated by













−

log

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