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AM5728 Datasheet(PDF) 132 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 132 Page - Texas Instruments |
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132 / 415 page ![]() 132 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated NOTE For more information, see the Serial Communication Interfaces / Ethernet Controller section of the device TRM. Table 4-20. GMAC Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL rgmii0_txc RGMII0 Transmit Clock O W9 rgmii0_txctl RGMII0 Transmit Enable O V9 rgmii0_txd3 RGMII0 Transmit Data O V7 rgmii0_txd2 RGMII0 Transmit Data O U7 rgmii0_txd1 RGMII0 Transmit Data O V6 rgmii0_txd0 RGMII0 Transmit Data O U6 rgmii0_rxc RGMII0 Receive Clock I U5 rgmii0_rxctl RGMII0 Receive Control I V5 rgmii0_rxd3 RGMII0 Receive Data I V4 rgmii0_rxd2 RGMII0 Receive Data I V3 rgmii0_rxd1 RGMII0 Receive Data I Y2 rgmii0_rxd0 RGMII0 Receive Data I W2 rgmii1_txc RGMII1 Transmit Clock O D5 rgmii1_txctl RGMII1 Transmit Enable O C2 rgmii1_txd3 RGMII1 Transmit Data O C3 rgmii1_txd2 RGMII1 Transmit Data O C4 rgmii1_txd1 RGMII1 Transmit Data O B2 rgmii1_txd0 RGMII1 Transmit Data O D6 rgmii1_rxc RGMII1 Receive Clock I C5 rgmii1_rxctl RGMII1 Receive Control I A3 rgmii1_rxd3 RGMII1 Receive Data I B3 rgmii1_rxd2 RGMII1 Receive Data I B4 rgmii1_rxd1 RGMII1 Receive Data I B5 rgmii1_rxd0 RGMII1 Receive Data I A4 mii1_rxd1 MII1 Receive Data I C1 mii1_rxd2 MII1 Receive Data I E4 mii1_rxd3 MII1 Receive Data I F5 mii1_rxd0 MII1 Receive Data I E6 mii1_rxclk MII1 Receive Clock I D5 mii1_rxdv MII1 Receive Data Valid I C2 mii1_txclk MII1 Transmit Clock I C3 mii1_txd0 MII1 Transmit Data O C4 mii1_txd1 MII1 Transmit Data O B2 mii1_txd2 MII1 Transmit Data O D6 mii1_txd3 MII1 Transmit Data O C5 mii1_txer MII1 Transmit Error O A3 mii1_rxer MII1 Receive Data Error I B3 mii1_col MII1 Collision Detect (Sense) I B4 mii1_crs MII1 Carrier Sense I B5 mii1_txen MII1 Transmit Data Enable O A4 mii0_rxd1 MII0 Receive Data I V6 mii0_rxd2 MII0 Receive Data I V9 |
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