XRT73L03IV datasheet(49/62 Pages) EXAR

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3 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73L03

PRELIMINARY

REV. P1.0.13

4.0

DIAGNOSTIC FEATURES OF THE XRT73L03

The XRT73L03 supports equipment diagnostic activi-

ties by supporting the following Loop-Back modes in

each channel in the XRT73L03:

• Analog Local Loop-Back.

• Digital Local Loop-Back

• Remote Loop-Back

NOTE: In this data sheet we use the convention that Chan-

nel(n) refers to either channel 1, 2 or 3. Similarly, specific

input and output pins use this convention to denote which

channel it is associated with.

4.1

THE ANALOG LOCAL LOOP-BACK MODE

When a given channel in the XRT73L03 is configured

to operate in the Analog Local Loop-Back Mode, it ig-

nores any signals that are input to its RTIP(n) and

RRing(n) input pins. The Transmitting Terminal

Equipment transmits clock and data into this channel

via the TPData(n), TNData(n) and TxClk(n) input

pins. This data is processed through the Transmit

Clock Duty Cycle Adjust PLL and the HDB3/B3ZS

Encoder. Finally, this data outputs to the line via the

TTIP(n) and TRing(n) output pins. Additionally, this

data loops back into the Attenuator/Receive Equalizer

Block. Consequently, this data is processed through

the entire Receive Section of the channel. After this

post-Loop-Back data has been processed through

the Receive Section it outputs to the Near-End Re-

ceiving Terminal Equipment via the RPOS(n),

RNEG(n) and RxClk(n) output pins.

Figure 29 illustrates the path the data takes in a given

channel of the XRT73L03 when it is configured to op-

erate in the Analog Local Loop-Back Mode.

A given channel in the XRT73L03 can be configured

to operate in the Analog Local Loop-Back Mode by

employing either one of the following two steps:

NOTE: See Table 2 for a description of Command Registers

and Addresses for the different channels.

a. Operating in the HOST Mode

To configure Channel (n) to operate in the Analog Lo-

cal Loop-Back Mode, write a "1" into the LLB(n) bit-

field and a "0" into the RLB(n) bit-field in Command

FIGURE 29. A CHANNEL IN THE XRT73L03 OPERATING IN THE ANALOG LOCAL LOOP-BACK MODE

AGC/

Equalizer

Peak

Detector

LOS Detector

Slicer

Clock

Recovery

Data

Recovery

Invert

Loop MUX

HDB3/

B3ZS

Decoder

LOSTHR(n)

SDI

SDO

SClk

REGR

RTIP(n)

RRing(n)

REQEN(n)

RxClk(n)

RPOS(n)

RNEG(n)

LCV(n)

ENDECDIS

RLOS(n)

LLB(n)

RLB(n)

TAOS(n)

TPData(n)

TNData(n)

TxClk(n)

Notes: 1.

(n) = 1, 2 or 3 for respective Channels

2. Serial Processor Interface input pins are shared by the three Channels in HOST Mode and redefined in

Hardware Mode.

RLOL(n) EXClk(n)

Device

Monitor

MTIP(n)

MRing(n)

Transmit

Logic

Duty Cycle Adjust

TxLEV(n)

TxOFF(n)

DMO(n)

TTIP(n)

TRing(n)

Pulse

Shaping

HDB3/

B3ZS

Encoder

Serial

Processor

Interface

Analog Local

Loop-Back Path

COMMAND REGISTER CR4-(n)

STS-1/DS3_ Ch(n)

E3_ Ch(n)

LLB(n)

RLB(n)

XRT73L03IV Datasheet(PDF) 49 Page - Exar Corporation

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