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AD9929BBCZ Datasheet(PDF) 60 Page - Analog Devices

Part # AD9929BBCZ
Description  CCD Signal Processor with Precision Timing Generator
PDF  64 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9929BBCZ Datasheet(HTML) 60 Page - Analog Devices

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AD9929
Rev. A | Page 60 of 64
CIRCUIT LAYOUT INFORMATION
The AD9929 typical circuit connection is shown in Figure 71.
The PCB layout is critical in achieving good image quality from
the AD9929 product. All of the supply pins must be decoupled
to ground with good quality, high frequency chip capacitors.
The 0.1 µF decoupling capacitors should be located as close as
possible to the supply pins, and should have a very low induc-
tance path to a continuous ground plane. There should also be a
4.7 µF or larger capacitor for each main supply, although it is
not necessary for each individual pin.
In most applications it is easier and recommended to share the
same supply for AVDD, DVDD, TCVDD, RGVDD, and HVDD,
as long as the individual supply pins are separately bypassed at
each supply pin. A separate 3 V supply should be used for
DRVDD with this supply pin decoupled to the same ground
plane as the rest of the chip. A separate ground for DRVSS is not
recommended.
The vertical driver VM supply pins can be connected to indi-
vidual supplies or to the same supply, depending on the appli-
cation requirement for the mid-level voltage on the vertical
outputs. These pins may also be directly connected to the
common ground plane, as shown in Figure 71.
The analog bypass pins, REFB, REFT, should also be carefully
decoupled to ground as close as possible to their respective pins.
The analog input, CCDIN, capacitor should also be located
close to the pin.
The H1, H2, and RG printed circuit board traces should be
designed to have low inductance to avoid excessive distortion of
the signals. Heavier traces are recommended because of the
large transient current demand by the CCD on H1 and H2. If
possible, physically locate the AD9929 close to the CCD to
reduce the inductance on these lines. As always, the routing
path should be as direct as possible from the AD9929 to the
CCD. Careful trace impedance considerations must also be
made with applications using a flex printed circuit (FPC) con-
necting the CCD to the AD9929. FPC trace impedances can be
controlled by applying a solid uniform ground plane under the
H1, H2, and RG traces. This helps minimize the amount of
overshoot and ringing on these signals at the CCD inputs.



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