MPA4609IPFBT datasheet(13/21 Pages) TI

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MPA4609

SBOS252D

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producing a 260mVPP at the VCA610 output—over 80dB of

gain with > 20MHz bandwidth.

One limiting factor to this approach is the input bias current

noise times the 3k

Ω bias resistors to the common-mode

voltage at the input. That current, plus the 3k

Ω resistor noise,

combine to produce a 12nV/

√Hz total differential input noise.

If the overall system noise power bandwidth is limited to

2MHz, this gives an input referred noise of 17

µV

RMS. While

a 200

µV

PP input will certainly still be detectable, the 20uVPP

at maximum VCA610 gain of 40dB may be below the noise

floor. Using an external common-mode voltage for the

MPA4609 with lower resistors can improve this performance.

OPERATING INFORMATION

INPUT STAGE AND CHANNEL SWITCHING

Each channel pair of the MPA4609 provides two very low

noise, bipolar, differential input stages that are selected by

controlling their tail current sources with their output collec-

tors connected together. Figure 7 shows a simplified sche-

matic for one channel pair with the channel select circuitry

shown.

The active input channel is selected by controlling which

stage is biased by their tail current sources (Q5 or Q12). The

F/R pin controls a simple differential stage (Q15 and Q16)

that steers small currents to the emmitters of Q7 and Q14.

Given a fixed-base string bias voltage for those two current

mirror transistors, a small current through their emmitter

resistors is adequate to shut off one or the other transistor.

A low voltage on the F/R pin will steer IB to the Q7 emmitter,

shutting off the bias for Q5 and turning off the forward input

transistor pair (Q1 and Q2). Conversely, zero current out of

Q16 leaves the bias to Q12 operating turning on the Reverse

channel inputs.

Both inputs are biased through 3k

Ω resistors to the internal

CM, a 2.1V bandgap reference with minimal temperature

drift. The specified input common-mode voltage is slightly

reduced from this 2.1V by the input transistor base currents

through the 3k

Ω resistors. Each input stage transistor collec-

tor is also bootstrapped through a second set of transistors

(Q3, Q4 and Q10, Q11) that cascode the signal current

through to the 2nd stage. These cascode transistors also

have a base voltage provided from V

CM increased by 1 diode

drop. This holds the nominal base-collector voltage of the

input transistors (Q1,Q2, and Q8, Q9) at 0V. This arrange-

ment improves the off channel isolation and PSRR giving

improved attenuation from an input signal present at the

inputs of a de-selected input to the output current from these

cascode transistors. This does, however, limit the available

positive going common-mode input voltage to only 300mV

above V

CM. Higher input common-mode voltages (when the

source is overriding the internally set common-mode input

voltage) will start to forward bias the base-collector junction

for the input transistors (Q1, Q2, and Q8, Q9). There is more

room going negatively to override the input common-mode

voltage, where the limit is the saturation of Q5 or Q12.

Ω

–

µA

Q16

Q15

B = +VS –1.1V

Q13

Q14

Ω

Q11

Q10

Q12

Stage

µA

F/R

FIGURE 7. Input Stage Schematic (1 of 4 channels).

MPA4609IPFBT Datasheet(PDF) 13 Page - Texas Instruments

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